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OPA1677DBVT Datasheet(PDF) 26 Page - Texas Instruments |
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OPA1677DBVT Datasheet(HTML) 26 Page - Texas Instruments |
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26 / 52 page ![]() 10.2 Layout Example OUTPUT A -IN A +IN A V± OUTPUT B -IN B +IN B V+ VS± GND Ground (GND) plane on another layer Keep input traces short and run the input traces as far away from the supply lines as possible. Place components close to device and to each other to reduce parasitic errors. Use low-ESR, ceramic bypass capacitor. Place as close to the device as possible. VIN A GND RF RG VIN B GND RF RG VS+ GND Output A Output B (Schematic Representation) + VIN B VOUT B RG RF + VIN A VOUT A RG RF Use low-ESR, ceramic bypass capacitor. Place as close to the device as possible. Figure 10-1. Operational Amplifier Board Layout for Noninverting Configuration OPA1677, OPA1678, OPA1679 SBOS855D – JANUARY 2017 – REVISED DECEMBER 2021 www.ti.com 26 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: OPA1677 OPA1678 OPA1679 |
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