LT3751 datasheet(11/16 Pages) AD

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LT3750A

Rev. 0

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APPLICATIONS INFORMATION

Board Layout

The high voltage operation of the the LT3750A demands

careful attention to board layout. Observe the following

points:

1. Minimize the area of the high voltage end of the sec-

ondary winding.

2. Provide sufficient spacing for all high voltage nodes

(NMOS drain, VOUT and the secondary winding of

the transformer) in order to meet breakdown voltage

requirements.

3. Keep the electrical path formed by C1, the primary of T1

and drain of the NMOS as small as possible. Increasing

the size of this path effectively increases the leakage

inductance of T1 resulting in an overvoltage condition

on the drain of the NMOS.

4. Reduce difference between CHARGE pin control cir-

cuit ground and the LT3750A ground to reduce GATE

pin turn-off delay during shutdown. This may be done

by using a Kelvin connection from the control circuit

ground to LT3750A ground, Pin 5.

CTRANS

CPRI

RBG

LT3750A

RSENSE

RDCM

RVOUT

COUT

3750a F04

DOUT

1:N

CIN

VCC

VTRANS

CHARGE

RDONE

•

Figure 4. Recommended Board Layout

(Not to Scale)

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