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MCT8316Z Datasheet(PDF) 13 Page - Texas Instruments |
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MCT8316Z Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 104 page  TJ = –40°C to +150°C, VVM = 4.5 to 35 V (unless otherwise noted). Typical limits apply for TA = 25°C, VVM = 24 V PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SR Phase pin slew rate switching low to high (Rising from 20 % to 80 %) VVM = 24 V, SLEW = 00b or SLEW pin tied to AGND 14 25 45 V/us VVM = 24 V, SLEW = 01b or SLEW pin to Hi-Z 30 50 80 V/us VVM = 24 V, SLEW = 10b or SLEW pin to 47 kΩ +/- 5% to AVDD 80 125 185 V/us VVM = 24 V, SLEW = 11b or SLEW pin tied to AVDD 130 200 280 V/us SR Phase pin slew rate switching high to low (Falling from 80 % to 20 % VVM = 24 V, SLEW = 00b or SLEW pin tied to AGND 14 25 45 V/us VVM = 24 V, SLEW = 01b or SLEW pin to Hi-Z 30 50 80 V/us VVM = 24 V, SLEW = 10b or SLEW pin to 47 kΩ +/- 5% to AVDD 80 125 185 V/us VVM = 24 V, SLEW = 11b or SLEW pin tied to AVDD 110 200 280 V/us ILEAK Leakage current on OUTx VOUTx = VVM, nSLEEP = 1 5 mA Leakage current on OUTx VOUTx = 0 V, nSLEEP = 1 1 µA tDEAD Output dead time (high to low / low to high) VVM = 24 V, SR = 25 V/µs, HS driver ON to LS driver OFF 1800 3400 ns VVM = 24 V, SR = 50 V/µs, HS driver ON to LS driver OFF 1100 1550 ns VVM = 24 V, SR = 125 V/µs, HS driver ON to LS driver OFF 650 1000 ns VVM = 24 V, SR = 200 V/µs, HS driver ON to LS driver OFF 500 750 ns tPD Propagation delay (high-side / low-side ON/OFF) VVM = 24 V, PWM = 1 to OUTx transisition, SR = 25 V/µs 2000 4550 ns VVM = 24 V, PWM = 1 to OUTx transisition, SR = 50V/µs 1200 2150 ns VVM = 24 V, PWM = 1 to OUTx transisition, SR = 125 V/µs 800 1350 ns VVM = 24 V, PWM = 1 to OUTx transisition, SR = 200 V/µs 650 1050 ns tMIN_PULSE Minimum output pulse width SR = 200 V/µs 600 ns CURRENT SENSE AMPLIFIER GCSA Current sense gain (SPI Device) CSA_GAIN = 00 0.15 V/A CSA_GAIN = 01 0.3 V/A CSA_GAIN = 10 0.6 V/A CSA_GAIN = 11 1.2 V/A GCSA Current sense gain (HW Device) GAIN pin tied to AGND 0.15 V/A GAIN pin to Hi-Z 0.3 V/A GAIN pin to 47 kΩ ± 5% to AVDD 0.6 V/A GAIN pin tied to AVDD 1.2 V/A GCSA_ERR Current sense gain error TA = 25°C, IPHASE < 4A –2 2 % TA = 25°C, IPHASE > 4A –3 3 % IPHASE < 4 A –3 3 % IPHASE > 4 A –5 5 % IMATCH Current sense gain error matching between phases A, B and C TA = 25°C –3 3 % –5 5 % www.ti.com MCT8316Z SLVSF18B – MARCH 2021 – REVISED NOVEMBER 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: MCT8316Z |
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