MAX9290 datasheet(88/103 Pages) MAXIM

88 / 103 page

MAX9288/MAX9290

3.12Gbps GMSL Deserializers

for Coax or STP Input and MIPI CSI-2 Output

www.maximintegrated.com

Maxim Integrated │ 88

Table 25. Register Table

ADDRESS

BITS

NAME

VALUE

FUNCTION

DEFAULT

VALUE

0x00

D[7:1]

SERID

XXXXXXX

Serializer device address (power-up default

value depends on latched address pin level).

XX00XX0

—

Reserved

0x01

D[7:1]

DESID

XXXXXXX

Deserializer device address (power-up default

value depends on latched address pin level).

XX01XXX

CFGBLOCK

Normal operation

Registers 0x00 to 0x1F and 0x60 to 0x67 are

read only.

0x02

D[7:6]

—

Reserved

AUDIOMODE

WS, SCK configured as output (deserializer-

sourced clock).

WS, SCK configured as input (system-sourced

clock).

AUDIOEN

Disable I2S/TDM channel.

Enable I2S/TDM channel.

D[3:0]

—

1111

Reserved

1111

0x03

D[7:0]

—

00000000

Reserved

00000000

0x04

LOCKED

LOCK output is low.

(Read only)

LOCK output is high.

—

Reserved

PRBSEN

Disable PRBS test.

Enable PRBS test.

SLEEP

Normal mode (power-up default value depends

on CDS and MS pin value at power-up).

0, 1

Activate sleep mode (power-up default value

depends on CDS and MS pin value at power-up).

D[3:2]

INTTYPE

Local control channel uses I2C when

I2CSEL = 0.

Local control channel uses UART when

I2CSEL = 0.

10, 11

Local control channel disabled.

REVCCEN

Disable reverse control channel to serializer

(sending).

Enable reverse control channel to serializer

(sending).

FWDCCEN

Disable forward control channel from serializer

(receiving)

Enable forward control channel from serializer

(receiving).

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