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MAX9290 Datasheet(PDF) 97 Page - Maxim Integrated Products

Part # MAX9290
Description  3.12Gbps GMSL Deserializers for Coax or STP Input and MIPI CSI-2 Output
PDF  103 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX9290 Datasheet(HTML) 97 Page - Maxim Integrated Products

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MAX9288/MAX9290
3.12Gbps GMSL Deserializers
for Coax or STP Input and MIPI CSI-2 Output
www.maximintegrated.com
Maxim Integrated │ 97
Table 25. Register Table (continued)
REGISTER
ADDRESS
BITS
NAME
VALUE
FUNCTION
DEFAULT
VALUE
0x64
D[7:6]
THSPREPARE
00
Drive data lane LP00 for 64ns +4UI before
starting HS transmission.
00
01
Drive data lane LP00 for 72ns + 4UI before
starting HS transmission.
1X
Drive data lane LP00 for 80ns + 4UI before
starting HS transmission.
D[5:4]
THSZERO
00
Drive HS0 state for 160ns + 24 - 32UI before
transmitting the sync sequence.
00
01
Drive HS0 state for 176ns + 24 - 32UI before
transmitting the sync sequence.
10
Drive HS0 state for 200ns + 24 - 32UI before
transmitting the sync sequence.
11
Drive HS0 state for 240ns + 24 - 32UI before
transmitting the sync sequence.
D[3:2]
THSTRAIL
00
Drive HSTRAIL state for 64ns + 8UI after the
last payload data bit of a HS transmission burst.
00
01
Drive HSTRAIL state for 80ns + 8UI after the
last payload data bit of a HS transmission burst.
10
Drive HSTRAIL state for 96ns + 8UI after the
last payload data bit of a HS transmission burst.
11
Drive HSTRAIL state for 120ns + 8UI after the
last payload data bit of a HS transmission burst.
D[1:0]
TLPX
00
64ns LPTX period length.
00
01
128ns LPTX period length.
10
192ns LPTX period length.
11
256ns LPTX period length
0x65
D7
—
0
Reserved
0
D6
DESEL
0
Normal DE operation.
0
1
HS input is the DE source.
D[5:4]
DATALANEN
00
Data lane D0 enabled.
01
01
Data lanes D0, D1 enabled.
10
Data lanes D0–D2 enabled.
11
Data lanes D0–D3 enabled.
D[3:0]
—
0111
Reserved
0111



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