Data Sheet

AD7380-4

Rev. 0 | Page 5 of 31

TIMING SPECIFICATIONS

of a multifunction pin in the parameters, only the portion of the pin name that is relevant to the specification is listed, such as ALERT. For full

pin names of multifunction pins, refer to the Pin Configuration and Function Descriptions section.

Table 4.

Parameter

Min

Typ

Max

Unit

Description

250

ns

Time between conversions

5

ns

CS falling edge to first SCLK falling edge

12.5

ns

SCLK period

5.5

ns

SCLK high time

5.5

ns

SCLK low time

20

ns

CS pulse width

20

ns

Interface quiet time prior to conversion

5.5

ns

CS low to SDOA and SDOB enabled

3

ns

SCLK rising edge to SDOA and SDOB hold time

5

ns

SCLK rising edge to SDOA and SDOB setup time

8

ns

CS rising edge to SDOA and SDOB high impedance

4

ns

SDI setup time prior to SCLK falling edge

4

ns

SDI hold time after SCLK falling edge

0

ns

SCLK rising edge to CS rising edge

190

ns

Conversion time

110

ns

Acquire time

250

ns

Valid time to start conversion after soft reset

800

ns

Valid time to start conversion after hard reset

Supply active to conversion

5

ms

First conversion allowed

5

ms

Settled to within 1% with external reference

5

ms

Supply active to register read write access allowed

Exiting shutdown mode to conversion

10

µs

Settled to within 1% with external reference

6

8

10

ns

Conversion time for first sample in oversampling (OS) normal mode

ns

220

ns

Time from CS to ALERT indication

10

ns

Time from CS to ALERT clear

20

ns

Time from internal conversion with exceeded threshold to ALERT indication