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AD7381 Datasheet(PDF) 18 Page - Analog Devices |
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AD7381 Datasheet(HTML) 18 Page - Analog Devices |
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18 / 31 page ![]() AD7380-4 Data Sheet Rev. 0 | Page 18 of 31 Rolling Average Oversampling Rolling average oversampling mode can be used in applications where higher output data rates are required and where a higher SNR or dynamic range is desirable. Rolling averaging involves taking a number of samples, adding them together, and dividing the result by the number of samples taken. This result is then output from the device. The sample data is not cleared when the process completes. The rolling oversampling mode uses a first in, first out (FIFO) buffer of the most recent samples in the averaging calculation, allowing the ADC throughput rate and output data rate to stay the same. Rolling average oversampling mode is configured by setting the OS_MODE bit to Logic 1 and having a valid nonzero value in the OSR bits. The oversampling ratio of the digital filter is controlled using the oversampling bits, OSR (see Table 12). Table 12 provides the oversampling bit decoding to select the different oversample rates. The output result is decimated to 16-bit resolution for the AD7380-4. If required, additional resolution can be achieved by configuring the resolution boost bit in the CONFIGURATION1 register. See the Resolution Boost section for further details. In rolling average oversampling mode, all ADC conversions are controlled and initiated by the falling edge of CS. When a conversion is complete, the result is loaded into the FIFO. The FIFO length is 8, regardless of the oversampling ratio set. The FIFO is filled on the first conversion after a power-on reset (POR), on the first conversion after a software controlled hard or soft reset. A new conversion result is shifted into the FIFO on completion of every ADC conversion regardless of the status of the OSR bits and the OS_MODE bit. This conversion allows a seamless transition from no oversampling to rolling average oversampling, or different rolling average oversampling ratios without waiting for the FIFO to fill. The number of samples, n, defined by the OSR bits are taken from the FIFO, added together and the result is divided by n. Table 12. Rolling Average Oversampling Overview SNR (dB Typical) Data Output Rate (kSPS Maximum) OSR, Bits[2:0] OS Ratio 2.5 V External Reference 3.3 V External Reference RES = 0 RES = 1 RES = 0 RES = 1 000 No oversampling 91 91 92.5 92.5 4000 001 2 92 93 93 94 4000 010 4 94 95.4 95 97 4000 011 8 95.5 98 97 99 4000 110 Invalid Not applicable Not applicable Not applicable Not applicable Not applicable 111 Invalid Not applicable Not applicable Not applicable Not applicable Not applicable CS INTERNAL VCC SDI SDOA S1 ACQ S2 ACQ ENABLE OS = 2 ENABLE OS = 4 S1 DON’T CARE S2 S3 ACQ S4 ACQ S5 ACQ S6 ACQ S7 ACQ ... S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 S1 FIFO 1 2 3 4 5 6 7 8 S2 FIFO 1 2 3 4 5 6 7 8 S1 S3 FIFO 1 2 3 4 5 6 7 8 S2 S1 S4 FIFO 1 2 3 4 5 6 7 8 S3 S2 S1 S5 FIFO 1 2 3 4 5 6 7 8 S4 S3 S2 S1 S6 FIFO 1 2 3 4 5 6 7 8 S5 S4 S3 S2 S1 S7 FIFO 1 2 3 4 5 6 7 8 S6 S5 S4 S3 S2 S1 (FIFO1 + FIFO2 + FIFO3 + FIFO4)/4 (FIFO1 + FIFO2)/2 (FIFO1 + FIFO2)/2 (FIFO1 + FIFO2)/2 tCYC SDOB Figure 32. Rolling Average Oversampling Mode Configuration |
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