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AD7381 Datasheet(PDF) 23 Page - Analog Devices |
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AD7381 Datasheet(HTML) 23 Page - Analog Devices |
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23 / 31 page ![]() Data Sheet AD7380-4 Rev. 0 | Page 23 of 31 READING FROM DEVICE REGISTERS All registers in the device can be read over the serial interface. A register read is performed by issuing a register read command followed by an additional SPI command that can be either a valid command or no operation command (NOP). The format for a read command is shown in Table 16. Bit D15 must be set to 0 to select a read command. Bits[D14:D12] contain the register address. The subsequent 12 bits, Bits[D11:D0], are ignored. WRITING TO DEVICE REGISTERS All the read/write registers in the AD7380-4 can be written to over the serial interface. The length of a SPI write access is determined by the CRC write function. An SPI access is 16 bits if CRC write is disabled and 24 bits when CRC write is enabled. The format for a write command is shown in Table 16. Bit D15 must be set to 1 to select a write command. Bits[D14:D12] contain the register address. The subsequent 12 bits, Bits[D11:D0], contain the data to be written to the selected register. CRC The AD7380-4 has CRC checksum modes that can be used to improve interface robustness by detecting errors in data transmissions. The CRC feature is independently selectable for SPI interface reads and writes. For example, enable the CRC function for SPI writes to prevent unexpected changes to the device configuration but do not enable it on SPI reads to maintain a higher throughput rate. The CRC feature is controlled by programming of the CRC_W bit and CRC_R bit in the CONFIGURATION1 register. CRC Read If enabled, a CRC consisting of an 8-bit word is appended to the conversion result or register reads. The CRC is calculated on the conversion result for ADC A, ADC B, ADC C, and ADC D, and is output on SDOA. A CRC is also calculated and appended to register read outputs. The CRC read function can be used in 2-wire SPI mode, 1-wire SPI mode, 4-wire SPI mode, and resolution boost mode. CS SDI S0 S1 S2 S3 S4 SDOA RESULT S0 REG1 DATA REG 2 DATA RESULT S3 INVALID RESULT S0 INVALID READ REG1 READ REG2 NOP NOP NOP RESULT S3 SDOB, SDOC, SDOD Figure 41. Register Read CS SDI S0 S1 S2 S3 SDOx RESULT S0 RESULT S1 RESULT S2 INVALID WRITE REG 1 WRITE REG 2 NOP NOP Figure 42. Register Write |
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