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MAX2021 Datasheet(PDF) 11 Page - Maxim Integrated Products |
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MAX2021 Datasheet(HTML) 11 Page - Maxim Integrated Products |
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11 / 14 page ![]() High-Dynamic-Range, Direct Up-/Downconversion 750MHz to 1200MHz Quadrature Mod/Demod ______________________________________________________________________________________ 11 R2, and R3. Tables 1 and 2 outline the performance trade-offs that can be expected for various combina- tions of these bias resistors. As noted within the tables, the performance trade-offs may be more pronounced for different operating frequencies. Contact the factory for additional details. Layout Considerations A properly designed PC board is an essential part of any RF/microwave circuit. Keep RF signal lines as short as possible to reduce losses, radiation, and induc- tance. For the best performance, route the ground pin traces directly to the exposed pad under the package. The PC board exposed paddle MUST be connected to the ground plane of the PC board. It is suggested that multiple vias be used to connect this pad to the lower- level ground planes. This method provides a good RF/thermal conduction path for the device. Solder the exposed pad on the bottom of the device package to the PC board. The MAX2021 evaluation kit can be used as a reference for board layout. Gerber files are avail- able upon request at www.maxim-ic.com. Power-Supply Bypassing Proper voltage-supply bypassing is essential for high- frequency circuit stability. Bypass all VCC_ pins with 33pF and 0.1µF capacitors placed as close to the pins as possible. The smallest capacitor should be placed closest to the device. To achieve optimum performance, use good voltage- supply layout techniques. The MAX2021 has several RF processing stages that use the various VCC_ pins, and while they have on-chip decoupling, off-chip interaction between them may degrade gain, linearity, carrier sup- pression, and output power-control range. Excessive coupling between stages may degrade stability. Exposed Pad RF/Thermal Considerations The EP of the MAX2021’s 36-pin thin QFN-EP package provides a low thermal-resistance path to the die. It is important that the PC board on which the IC is mounted be designed to conduct heat from this contact. In addi- tion, the EP provides a low-inductance RF ground path for the device. The exposed paddle (EP) MUST be soldered to a ground plane on the PC board either directly or through an array of plated via holes. An array of 9 vias, in a 3 x 3 array, is suggested. Soldering the pad to ground is critical for efficient heat transfer. Use a solid ground plane wherever possible. Note: VCC = 5V, PLO = 0dBm, TA = +25°C, I/Q voltage levels = 1.4VP-P differential. LO FREQ (MHz) RF FREQ (MHz) R1 ( Ω Ω Ω Ω) R2 ( Ω Ω Ω Ω) R3 ( Ω Ω Ω Ω) ICC (mA) OIP3 (dBm) LO LEAK (dBm) IMAGE REJ (dBc) OIP2 (dBm) 420 620 330 271 19.6 -32.1 23.9 50.5 453 665 360 253 21.9 -32.7 34.0 51.0 499 698 402 229 18.9 -33.7 30.0 52.6 549 806 464 205 15.7 -34.4 23.7 46.0 800 801.8 650 1000 550 173 13.6 -34.2 23.3 32.3 420 620 330 271 20.7 -31.4 43.4 54.0 453 665 360 253 21.6 -31.6 42.4 55.4 499 698 402 229 20.6 -31.8 42.7 59.8 549 806 464 205 19.0 -31.9 40.3 50.7 900 901.8 650 1000 550 173 14.9 -30.5 25.0 34.6 420 620 330 271 22.4 -32.8 39.3 55.5 453 665 360 253 22.2 -33.2 39.1 56.3 499 698 402 229 19.9 -33.8 43.5 55.0 549 806 464 205 17.6 -34.8 40.5 51.4 1000 1001.8 650 1000 550 173 14.6 -33.9 36.8 32.8 Table 1. Typical Performance Trade-Offs as a Function of Current Draw—Modulator Mode |
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