MIC5252 datasheet(10/22 Pages) MICROCHIP

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MIC5252

DS20006579B-page 10

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2021 - 2022 Microchip Technology Inc.

4.0

APPLICATION INFORMATION

4.1

Enable Shutdown

The MIC5252 comes with an active-high enable pin

that allows the regulator to be disabled. Forcing the

enable pin low disables the regulator and sends it into

a “zero” off-mode-current state. In this state, current

consumed by the regulator goes nearly to zero. Forcing

the enable pin high enables the output voltage. This

part is CMOS and the enable pin cannot be left floating;

a floating enable pin may cause an indeterminate state

on the output.

4.2

Input Capacitor

The MIC5252 is a high performance, high bandwidth

device. Therefore, it requires a well-bypassed input

supply for optimal performance. A 1 μF capacitor is

required from the input to ground to provide stability.

Low-ESR ceramic capacitors provide optimal

performance at a minimum of space. Additional

high-frequency capacitors, such as small valued NPO

dielectric type capacitors, help filter out high frequency

noise and are good practice in any RF based circuit.

4.3

Output Capacitor

The MIC5252 requires an output capacitor for stability.

The design requires 1 μF or greater on the output to

maintain stability. The design is optimized for use with

low-ESR ceramic chip capacitors. High ESR capacitors

may cause high frequency oscillation. The maximum

recommended ESR is 300 mΩ. The output capacitor

can be increased, but performance has been optimized

for a 1 μF ceramic output capacitor and does not

improve significantly with larger capacitance.

X7R/X5R dielectric-type ceramic capacitors are

recommended

because

their

temperature

performance. X7R-type capacitors change capacitance

by 15% over their operating temperature range and are

the most stable type of ceramic capacitors. Z5U and

Y5V dielectric capacitors change value by as much as

50% and 60%, respectively, over their operating

temperature ranges. To use a ceramic chip capacitor

with Y5V dielectric, the value must be much higher than

an X7R ceramic capacitor to ensure the same

minimum capacitance over the equivalent operating

temperature range.

4.4

Bypass Capacitor

A capacitor is required from the noise bypass pin to

ground to reduce output voltage noise. The capacitor

bypasses the internal reference. A 0.01 μF capacitor is

recommended for applications that require low-noise

outputs. The bypass capacitor can be increased,

further reducing noise and improving PSRR. Turn-on

time increases slightly with respect to bypass

capacitance. A unique quick-start circuit allows the

MIC5252 to drive a large capacitor on the bypass pin

without significantly slowing turn-on time. Refer to the

Typical Performance Curves section for performance

with different bypass capacitors.

4.5

Active Shutdown

The MIC5252 also features an active shutdown clamp,

which is an N-Channel MOSFET that turns on when the

device is disabled. This allows the output capacitor and

load to discharge, de-energizing the load.

4.6

No-Load Stability

The MIC5252 will remain stable and in regulation with

no load unlike many other voltage regulators. This is

especially important in CMOS RAM keep-alive

applications.

4.7

Thermal Considerations

The MIC5252 is designed to provide 150 mA of

continuous current in a very small package. Maximum

power dissipation can be calculated based on the

output current and the voltage drop across the part. To

determine the maximum power dissipation of the

package, use the junction-to-ambient thermal

resistance of the device and the following basic

equation:

EQUATION 4-1:

TJ(MAX) is the maximum junction temperature of the

die, 125°C, and TA is the ambient operating

temperature. θJA is layout-dependent; Table 4-1 shows

examples of junction-to-ambient thermal resistance for

the MIC5252.

TABLE 4-1:

SOT-23-5 THERMAL

RESISTANCE

The actual power dissipation of the regulator circuit can

be determined using the equation:

Package

θJA

Recommended

Minimum

Footprint

θJA 1”

Square

Copper

Clad

θJC

SOT-23-5

(M5 or

D5)

235°C/W

185°C/W

145°C/W

PD MAX





TJ MAX





–

JA

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