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RT600 Datasheet(PDF) 49 Page - NXP Semiconductors |
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RT600 Datasheet(HTML) 49 Page - NXP Semiconductors |
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49 / 165 page  RT600 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors B.V. 2021. All rights reserved. Product data sheet Rev. 1.9 — 30 December 2021 49 of 163 NXP Semiconductors RT600 Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4 Audio DSP CPUs [4] These pins are intended for connection to an off-chip power management IC (PMIC) if such a device is used to supply power to core logic to this device. These pins may be used for other purposes if the on-chip regulator is used to supply power to core logic. [5] See Section 13.1 “General operating conditions” for specification of actual allowable voltage ranges. [6] On WLCSP114 package, USB ISP mode is not supported. VBUS pin is not available on the WLCSP114 package. To detect VBUS connection, user can connect a GPIO pin to the USB connector's VBUS. When a rising edge occurs on the GPIO pin, software should set bit 10 (FORCE_VBUS) and bit 16 (DCON) in the DEVCMDSTAT register. [7] On the WLCSP package, VDDA_ADC1V8 is internally connected to VDD1V8 pin; VDDA_BIAS is internally connected to VDDIO_0; VREFP is internally connected to VDD1V8; VREFN is internally connected to VSS; VSSA is internally connected to VSS. |
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