NXP Semiconductors

SC18IS604

Register

value

0xF8

1

1

1

1

1

0

0

0

timeout register (I2CTO)"). SC18IS604 has

longer than the time programmed in I2CTO

register. This could happen after a period of

target is (continuously) pulling the SCL clock

LOW. An interrupt is generated on INT.)

0xF9

1

1

1

1

1

0

0

1

specified in a read or write command to SC18IS6

04. An interrupt is generated on INT.

connected to the bus, and it has the following features:

• Bidirectional data transfer between controllers and targets

• Multi-controller bus (no central controller)

• Arbitration between simultaneously transmitting controllers without corruption of serial

data on the bus

• Serial clock synchronization allows devices with different bit rates to communicate via

one serial bus

• Serial clock synchronization can be used as a handshake mechanism to suspend and

resume serial transfer

RPU

aaa-039903

SC18IS604

DEVICE

DEVICE

SDA

SCL

RPU

6.4 Serial Peripheral Interface (SPI)

The host communicates with SC18IS604 via the SPI interface. SC18IS604 operates in

Slave mode up to 1.2 MHz.

The SPI interface has four pins: SCLK, MOSI, MISO, and CS.

• SCLK, MOSI and MISO are typically tied together between two or more SPI devices.

Data flows from the master to SC18IS604 on the MOSI (Master Out Slave In) pin and

SC18IS604

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© NXP B.V. 2021. All rights reserved.

Product data sheet

Rev. 1.0 — 22 September 2021

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