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SC18IS604 Datasheet(PDF) 1 Page - NXP Semiconductors |
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SC18IS604 Datasheet(HTML) 1 Page - NXP Semiconductors |
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1 / 29 page  SC18IS604 SPI to I2C-bus bridge Rev. 1.0 — 22 September 2021 Product data sheet 1 General description SC18IS604 is designed to serve as an interface between the standard SPI of a host (microcontroller, microprocessor, chip set, etc.) and the serial I2C-bus. This allows the host to communicate directly with other I2C-bus devices. SC18IS604 can operate as an I2C-bus controller-transmitter or controller-receiver. SC18IS604 controls all the I2C-bus specific sequences, protocol, arbitration and timing. SC18IS604 is a functional replacement for SC18IS600 with exception of: • New pinout • Transmit and receive buffer of 255 bytes vs 96 bytes • Five instead of six GPIOs; no quasi bidirectional mode • Lower operating supply voltage level (1.71 V vs 2.4 V) • Temperature range of -40 to +105 °C vs -40 to +85 °C • Device is rotated 180 degrees in the tape pocket; pin 1 is now in Quadrant 1 2 Features and benefits • SPI slave interface • SPI Mode 3 • Single primary I2C-bus controller • Five General Purpose Input/Output (GPIO) pins • 5 V tolerant I/O pins • High-speed SPI: Up to 1.2 MHz • Fast-mode I2C-bus: 375 kHz • 255-byte transmit buffer • 255-byte receive buffer • 1.71 V to 3.6 V operation • Deep Power-down mode with SPI CS wake up • Internal oscillator • Active LOW interrupt output • ESD protection exceeds 2000 V HBM per JESD22-A114 • Latch-up testing is done to JEDEC Standard JESD78 that exceeds 100 mA • Available in TSSOP16 package |
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