ADSY8401 datasheet(7/16 Pages) AD

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ADSY8401

Rev. 0 | Page 7 of 16

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

ADSY8401

TOP VIEW

(Not to Scale)

DVCC

GSW

SEL

AGNDL

DO9T

DO9C

DO10T

DO10C

DO11T

DO11C 10

AVCCL1 11

DI11 12

AVCCL3

DO1

DO2

DO3

DO4

AGNDL

AVCCL2

DO5

DO6

DO7

DO8

AGNDL

Figure 2. Pin Configuration

Table 3. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 18

DVCC

Digital Power Supply.

GSW

Grounded Mode Switch. When the voltage on the GSW pin is tied to DGND, the AMPO, MUXO, and

BFRO outputs are pulled to near AGND. When the GSW input is left unconnected or tied to DVCC, all

outputs operate normally. The level shifters are not affected by the GSW input.

3, 39–41

SEL, MUXA, MUXB,

MUXO

Analog Precharge. Low offset unity gain amplifier with MUXed inputs. Drives large capacitive loads. For

driving large capacitive loads at high slew rates, connect MUXO to BFRI and the load capacitance to

BFRO.

SEL = HIGH selects MUXA.

4, 25, 31

AGNDL

Level Shifter Ground.

5–10

DO9–11T, DO9–11C

Complementary Level Shifter Outputs. While the corresponding input voltage of these level shifters is

below the threshold voltage, the voltage at the noninverting output pins is at VOL and the voltage at

the inverting outputs is at VOH. While the corresponding input voltage of these level shifters is above

the threshold voltage, the voltage at the noninverting output pins is at VOH and the voltage at the

inverting outputs is at VOL.

11, 30, 36

AVCCL1, 2, 3

Level Shifter Power Supply.

12–14

DI9–11

Complementary Level Shifter Inputs. Low voltage input of the complementary level shifters.

15–17,

20–24

DI1–8

Inverting Level Shifter Inputs. Low voltage input of the inverting level shifters.

19, 47

DGND

Digital Ground. This pin is normally connected to the digital ground plane.

26–29,

32–35

DO1-8

Inverting Level Shifter Outputs. While the corresponding input voltage of these level shifters is below

the threshold voltage, the output voltage at these pins is at VOH. While the corresponding input voltage

of these level shifters is above the threshold voltage, the output voltage at these pins is at VOL.

37–38

AMPO, AMPI

Analog Amplifier. Low offset unity gain amplifier. Drives large capacitive loads such as VCOM.

42, 44

BFRI, BFRO

Analog Buffer. High current output buffer.

AVCC

Analog Power Supplies. Analog power supplies for the level shifter and the amplifiers.

AGND

Analog Supply Returns. Analog supply returns for the level shifter and the amplifiers.

DTCTO

Edge Detecting Level Shifter Output. Logic output of the inverting level shifting edge detector.

DTCTI

Edge Detecting Level Shifter Input. High voltage input of the inverting level shifting edge detector.

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