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ADSY8401 Datasheet(PDF) 9 Page - Analog Devices |
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ADSY8401 Datasheet(HTML) 9 Page - Analog Devices |
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9 / 16 page ![]() ADSY8401 Rev. 0 | Page 9 of 16 LEVEL SHIFTER CHARACTERISTICS LEVEL SHIFTER TIMING CHARACTERISTICS DI1 DI2 DI3 DI4 DI5 DI6 DI7 DI8 DO1 DO2 DO3 DO4 DO5 DO6 DO7 DO8 INVERTING DI9 DI10 DI11 DO9T DO10T DO11T DO9C DO10C DO11C COMPLEMENTARY Figure 6. Level Shifter Timing Characteristics INVERTING AND COMPLEMENTARY LEVEL SHIFTER TIMING INPUTS INVERTING OUTPUTS NONINVERTING OUTPUTS t14 t13 t12 t11 t15 t17 t16 t18 Figure 7. Inverting and Complementary Level Shifter Timing Table 4. Parameter Conditions Min Typ Max Unit LEVEL SHIFTER SECTION TA min to TA max Output Rise, Fall Times, tr, tf DO1–DO8, DO9T–DO11T, DO9C–DO11C CL = 40 pF 20 30 ns DO1–DO8 CL = 300 pF 130 150 ns Propagation Delay times, t11, t12, t13, t14 DO1–DO8, DO9T–DO11T, DO9C–DO11C CL = 40 pF 23 50 ns DO1–DO8 CL = 300 pF 60 80 ns Propagation Delay Skew, t15, t16 CL = 40 pF DO1–DO8 2 ns Propagation Delay Skew, t15, t16, t17, t18 CL = 40 pF DO1–DO8 to DO9T–DO11T and DO9C–DO11C 4 ns |
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