F1490 datasheet(7/48 Pages) RENESAS

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F1490 Datasheet

November 15, 2021

Pin Descriptions

Table 1.

Pin Descriptions

Number

Name

Description

1, 5, 6, 7,

8, 9, 12

No internal connection. These pins can be left unconnected, or be connected to ground

(recommended). Use a via as close to the pin as possible if grounded.

RFIN

RF input internally matched to 50Ω. Must use an external DC block.

GND

Internally grounded. This pin can be left unconnected, or it can be connected to ground

(recommended).

VDD

Pull up to VDD through inductor and use bypass capacitors as close to the pin as possible. In addition

to supplying the device with a DC voltage, there is also an RF signal present.

10, 11

RFOUT

RF output. Pull up to VDD through inductor. Must use external DC block.

BIAS_2

Connect via resistor to a common VDD and use bypass capacitors. Place network as close to the pin

as possible.

BIAS_1

Connect via resistor to a common VDD and use bypass. Place network as close to the pin as possible.

GAIN_SEL

Gain Selection pin. Logic HIGH selects High Gain Mode operation. Logic LOW (or if the pin is left

unconnected or grounded) selects Low Gain Mode operation. Pin is 1.8V logic compatible.

STBY

Standby pin. With Logic LOW applied to this pin, the amplifier is powered off. With Logic HIGH

applied to this pin (or if the pin is left unconnected), the part is in full operation mode. Pin is 1.8V logic

compatible.

—

EPAD

Exposed Pad. Internally connected to ground. Solder this exposed pad to a PCB pad that uses

multiple ground vias to provide heat transfer out of the device into the PCB ground planes. These

multiple ground vias are also required to achieve the noted RF performance.

F1490 Datasheet(PDF) 7 Page - Renesas Technology Corp