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STA1275 Datasheet(PDF) 23 Page - STMicroelectronics |
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STA1275 Datasheet(HTML) 23 Page - STMicroelectronics |
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23 / 109 page  DS12586 Rev 5 23/109 STA1295, STA1275 System description 106 GPIO104 FSMC_WEn I2C2_SDA — ETM_D12 GPIO105 FSMC_SMAD17/ALE I2C2_SCL — ETM_CLK GPIO106 FSMC_SMAD16/CLE UART2_RX — ETM_CTL GPIO107 FSMC_NAND_CS0n UART2_TX — — GPIO108(1) SQI_SIO3 SAI4_BCLK FSMC_SMADQ_10 — GPIO109(1) SQI_SIO2 SAI4_FS FSMC_SMADQ_11 — GPIO110(1) SQI_SIO1 SAI4_TX0 FSMC_SMADQ_12 — GPIO111(1) SQI_SIO0 SAI4_TX1 FSMC_SMADQ_13 — GPIO112(1) SQI_SCK SAI4_RX0 FSMC_SMADQ_14 — GPIO113(1) SQI_CE0n SAI4_RX1 FSMC_SMADQ_15 — GPIO114 I2C2_SDA SDMMC2_DAT0_DIR ETH_MDIO — GPIO115 I2C2_SCL SDMMC2_DAT31_DIR ETH_MDC — GPIO116 ETH_TXEN SPI2_TXD I2S2_TX — GPIO117 ETH_TX[0] SPI2_RXD I2S2_RX — GPIO118 ETH_TX[1] SPI2_SS I2S2_FS — GPIO119 ETH_RXDV_CRS SPI2_SCK I2S2_BCLK — GPIO120 ETH_RX[0] — — — GPIO121 ETH_RX[1] — — — GPIO122 ETH_RMII_CLK ETH_MII_RX_CLK — — GPIO123 ETH_TX[2] UART2_RX I2S2_TX — GPIO124 ETH_TX[3] UART2_TX I2S2_RX — GPIO125 ETH_RX[2] ETH_RX_ER USB0_DRVVBUS — GPIO126 ETH_RX[3] UART3_RX I2S2_FS — GPIO127 ETH_MII_TX_CLK UART3_TX I2S2_BCLK — 1. The default reset state of GPIO108 to GPIO113 depends on the value latched at reset of REMAP[1:0]. 0b00: GPIO input 0b01: GPIO input 0b10: ALT-A (SQI interface for XiP) GPIO108 ALT-A input PU (SQI_SIO3) GPIO109 ALT-A input PU (SQI_SIO2) GPIO110 ALT-A input PU (SQI_SIO1) GPIO110 ALT-A input PU (SQI_SIO1) GPIO111 ALT-A input PU (SQI_SIO0) GPIO112 ALT-A output low (SQI_SCK) GPIO113 ALT-A output high (SQI_CE0n) 0b11: GPIO input In case of REMAP[1:0]=0b10, the configuration cannot be changed if not through a hardware reset, with a different REMAP configuration. Table 10. Application GPIO alternate function mapping (continued) GPIO ALT A ALT B ALT C DEBUG |
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