Figure 5. Relative variation of thermal impedance junction

to case and junction to ambient versus pulse duration

0.01

0.10

1.00

1.0E-03

1.0E-02

1.0E-01

1.0E+00

1.0E+01

1.0E+02

1.0E+03

K = [Zth(j-a)/ Rth(j-a)]

Zth(j-a)

Zth(j-c)

t

P(s)

Figure 6. Surge peak on-state current versus number of

cycles

0

1

2

3

4

5

6

7

8

1

10

100

1000

Non repetitive T

j

= 25 °C

Number of cycles

ITSM(A)

Repetitive T

c

= 41 °C

t =10ms

p

One cycle

Figure 7. Non repetitive surge peak on-state current for a

sinusoidal pulse with width tp < 10 ms

0

1

10

100

1000

0.01

0.10

1.00

10.00

Tj initial = 25 °C

I

TSM

ITSM(A)

dl/dt limitation

A/µs

tp(ms)

Figure 8. Relative variation of gate trigger current, holding

current and latching current versus junction temperature

(typical values)

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

-40

-20

0

20

40

60

80

100

120

IGT

IH and IL

T

j(°C)

IH, IL [ Tj ] / IGT IH, IL [ Tj = 25 °C]

Figure 9. Relative variation of holding current versus

gate-cathode resistance (typical values)

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

1.E-01

1.E+00

1.E+01

IH[Rgk] / IH [Rgk=1kΩ]

Rgk(kΩ)

Figure 10. Relative variation of static dV/dt immunity

versus junction temperature

0

1

2

3

4

25

50

75

100

125

V

D = VR = 402 V

Tj(°C)

dV/dt [T

j] / dV/dt [Tj = 125 °C]

X0115ML

Characteristics (curves)

DS13776 - Rev 3

page 4/10