LTC1760 datasheet(32/44 Pages) LINER

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LTC1760

sn1760 1760is

Automatic Current Sharing

In a dual parallel charge configuration, the LTC1760 does

not actually control the current flowing into each individual

battery. The capacity, or Amp-Hour rating, of each battery

determines how the charger current is shared. This auto-

matic steering of current is what allows both batteries to

reach their full capacity points at the same time. In other

words, given all other things equal, charge termination will

happen simultaneously.

A battery can be modeled as a huge capacitor and hence

governed by the same laws.

I = C • (dV/dT) where:

–

CB1

CB2

CSN

1760 F07

VREF

VSET

RVSET

7.2k

RVF

405.3k

∆Σ

MODULATOR

SWV

ITH

DAC

VALUE

(11 BITS)

Figure 7. Voltage DAC Operation

–

1760 F08

VREF

ISET

RSET

18.77k

∆Σ

MODULATOR

ITH

DAC

VALUE

(10 BITS)

CSET

(VCSP – VCSN)

Ω

(FROM CA1 AMPLIFIER)

Figure 8. Current Dac Operation

(11/8)RVSET/(VDAC(VALUE)/2047). In regulation, VSET is

servo driven to the 0.8V reference voltage, VREF.

RSET is matched against a current derived from the voltage

between pins CSP and CSN. This current is (VCSP – VCSN)/

3k.

Therefore programmed current is:

ICHG = 0.8 VREF 3k/(RSNS RSET) • (IDAC(VALUE)/1023)

= (102.3mV/RSNS) • (IDAC(VALUE)/1023)

OPERATIO

APPLICATIO S I FOR ATIO

Capacitors CB1 and CB2 are used to average the voltage

present at the VSET pin as well as provide a zero in the

voltage loop to help stability and transient response time

to voltage variations.

10 The Current DAC Block

The current DAC is a delta-sigma modulator which

controls the effective value of an internal resistor,

RSET = 18.77k, used to program the maximum charger

current. Figure 8 is a simplified diagram of the DAC

operation. The delta-sigma modulator and switch convert

the IDAC value to a variable resistance equal to 1.25RSET/

(IDAC(VALUE)/1023). In regulation, ISET is servo driven to

the 0.8V reference voltage, VREF, and the current from

During wake-up current operation, the current DAC enters

a low current mode. The current DAC output is pulse-width

modulated with a high frequency clock having a duty cycle

value of 1/8. Therefore, the maximum output current

provided by the charger is IMAX/8. The delta-sigma output

gates this low duty cycle signal on and off. The delta-sigma

shift registers are then clocked at a slower rate, about

40ms/bit, so that the charger has time to settle to the IMAX/

8 value.

I = The current flowing through the capacitor

C = Capacity rating of battery (using amp-hour values

instead of capacitance)

dV = Change in voltage

dt = Change in time

The equivalent model of a set or parallel batteries is a set

of parallel capacitors. Since they are in parallel, the change

in voltage over change in time is the same for both

batteries one and two.

dV/dtBAT1 = dV/dtBAT2

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