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LTC1760 Datasheet(PDF) 5 Page - Linear Technology |
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LTC1760 Datasheet(HTML) 5 Page - Linear Technology |
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5 / 44 page  LTC1760 5 sn1760 1760is ELECTRICAL CHARACTERISTICS The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VDCIN = 20V, VBAT1 = 12V, VBAT2 = 12V, VVDDS = 3.3V, VVCC2 = 5.2V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS tONPI Gate B1I/B2I/DCI Turn-On Time VGS < –3V, CLOAD = 3000pF (Note 4) 300 µs tOFFPI Gate B1I/B2I/DCI Turn-Off Time VGS > –1V, CLOAD = 3000pF (Note 4) 10 µs VPONI Input Gate Clamp Voltage ILOAD = 1µA GB1I Highest (VBAT1 or VSCP) – VGB1I 4.75 6.7 7.5 V GB2I Highest (VBAT2 or VSCP) – VGB2I 4.75 6.7 7.5 V GDCI Highest (VDCIN or VSCP) – VGDCI 4.75 6.7 7.5 V VPOFFI Input Gate Off Voltage ILOAD = –25µA GB1I Highest (VBAT1 or VSCP) – VGB1I 0.18 0.25 V GB2I Highest (VBAT2 or VSCP) – VGB2I 0.18 0.25 V GDCI Highest (VDCIN or VSCP) – VGDCI 0.18 0.25 V Thermistor Thermistor Trip CLOAD(MAX) = 300pF (Note 9) q 95 100 105 k Ω (COLD-RANGE/OVER-RANGE) R1A = R2A = 1130 Ω ±1% R1B = R2B = 54900 Ω ±1% Thermistor Trip CLOAD(MAX) = 300pF (Note 9) q 28.5 30 32.5 k Ω (IDEAL-RANGE /COLD-RANGE) R1A = R2A = 1130 Ω ±1% R1B = R2B = 54900 Ω ±1% Thermistor Trip CLOAD(MAX) = 300pF (Note 9) q 2.85 3 3.15 k Ω (HOT-RANGE /IDEAL-RANGE) R1A = R2A = 1130 Ω ±1% R1B = R2B = 54900 Ω ±1% Thermistor Trip CLOAD(MAX) = 300pF (Note 9) q 425 500 575 Ω (UNDER-RANGE /HOT-RANGE) R1A = R2A = 1130 Ω ±1% R1B = R2B = 54900 Ω ±1% Logic Levels SCL/SCL1/SCL2/SDA/SDA1/ q 0.8 V SDA2 Input Low Voltage (VIL) SCL/SCL1/SCL2/SDA/SDA1/ q 2.1 V SDA2 Input High Voltage (VIH) SCL/SCL1/SCL2/SDA/SDA1/ VSDA, VSCL, VSDA1, VSCL1, q –5 5 µA SDA2 Input Leakage Current VSDA2, VSCL2 = 0.8V SCL/SCL1/SCL2/SDA/SDA1/ VSDA, VSCL, VSDA1, VSCL1, VSDA2, q –5 5 µA SDA2 Input Leakage Current VSCL2 = 2.1V IPULLUP SCL1/SDA1/SCL2/SDA2 Pull-Up VSCL1 = VSDA1 = VSCL2 = VSDA2 = 0.4V 165 220 350 µA Current When Not Connected to VVCC2 = 4.85V and 5.55V (Current is Through SMBus Host. Internal Series Resistor and Schottky to VCC2) SCL1/SDA1/SCL2/SDA2 VSDA1, VSCL1, VSDA2, VSCL2 = 0.8V q 300 Ω Series Impedance to Host SMBus. SCL/SDA Output Low Voltage (VOL). IPULLUP = 350µA q 0.4 V LTC1760 Driving the Pin. SCL1/SDA1/SCL2/SDA2 Pullup IPULLUP Internal to LTC1760 q 0.4 V Output Low Voltage (VOL). LTC1760 Driving the Pin with Battery SMBus not Connected to Host SMBus. SCL1/SDA1/SCL2/SDA2 IPULLUP = 350µA on Host Side q 0.4 V Output Low Voltage (VOL). LTC1760 Driving the Pin with Battery SMBus Connected to Host SMBus |
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