INN3166C datasheet(4/33 Pages) POWERINT

4 / 33 page

Rev. J 11/22

InnoSwitch3-CE

www.power.com

Primary Controller

InnoSwitch3-CE has variable frequency QR controller plus CCM/CrM/

DCM operation for enhanced efficiency and extended output power

capability.

PRIMARY BYPASS Pin Regulator

The PRIMARY BYPASS pin has an internal regulator that charges the

PRIMARY BYPASS pin capacitor to V

BPP by drawing current from the

DRAIN pin whenever the power switch is off. The PRIMARY BYPASS

pin is the internal supply voltage node. When the power switch is on,

the device operates from the energy stored in the PRIMARY BYPASS

pin capacitor.

In addition, a shunt regulator clamps the PRIMARY BYPASS pin

voltage to V

SHUNT when current is provided to the PRIMARY BYPASS

pin through an external resistor. This allows the InnoSwitch3-CE to

be powered externally through a bias winding, decreasing the no-load

consumption to less than 30 mW in a 5 V output design.

Primary Bypass ILIM Programming

InnoSwitch3-CE ICs allows the user to adjust current limit (ILIM)

settings through the selection of the PRIMARY BYPASS pin capacitor

value. A ceramic capacitor can be used.

There are 2 selectable capacitor sizes - 0.47 mF and 4.7 mF for setting

standard and increased ILIM settings respectively.

Primary Bypass Undervoltage Threshold

The PRIMARY BYPASS pin undervoltage circuitry disables the power

switch when the PRIMARY BYPASS pin voltage drops below ~4.5 V

BPP - VBP(H)) in steady-state operation. Once the PRIMARY BYPASS

pin voltage falls below this threshold, it must rise to V

SHUNT to

re-enable turn-on of the power switch.

Primary Bypass Output Overvoltage Function

The PRIMARY BYPASS pin has latching/auto-restart OV protection

feature depending on H code. A Zener diode in parallel with the

resistor in series with the PRIMARY BYPASS pin capacitor is typically

used to detect an overvoltage on the primary bias winding and

activate the protection mechanism. In the event that the current into

the PRIMARY BYPASS pin exceeds ISD, the device will latch-off or

disable the power switch switching for a time t

AR(OFF), after which time

the controller will restart and attempt to return to regulation (see

Secondary Fault Response in the Feature Code Addenda).

VOUT OV protection is also included as an integrated feature on the

secondary controller (see Output Voltage Protection).

Over-Temperature Protection

The thermal shutdown circuitry senses the primary switch die

temperature. The threshold is set to T

SD with either a hysteretic or

latch-off response depending on H code.

Hysteretic response: If the die temperature rises above the threshold,

the power switch is disabled and remains disabled until the die

temperature falls by T

SD(H) at which point switching is re-enabled. A

large amount of hysteresis is provided to prevent over-heating of the

PCB due to a continuous fault condition.

Latch-off response: If the die temperature rises above the threshold

the power switch is disabled. The latching condition is reset by

bringing the PRIMARY BYPASS pin below V

BPP(RESET) or by going below

the UNDER/OVER INPUT VOLTAGE pin UV (I

UV-) threshold.

Current Limit Operation

The primary-side controller has a current limit threshold ramp that is

linearly decreasing to the time from the end of the previous primary

switching cycle (i.e. from the time the primary switch turns off at the

end of a switching cycle).

This characteristic produces a primary current limit that increases as

the switching frequency (load) increases (Figure 6).

This algorithm enables the most efficient use of the primary switch

with the benefit that this algorithm responds to digital feedback

information immediately when a feedback switching cycle request is

received.

At high load, switching cycles have a maximum current approaching

100% I

LIM. This gradually reduces to 30% of the full current limit as

load decreases. Once 30% current limit is reached, there is no

further reduction in current limit (since this is low enough to avoid

audible noise). The time between switching cycles will continue to

increase as load reduces.

Jitter

The normalized current limit is modulated between 100% and 95%

at a modulation frequency of f

M. This results in a frequency jitter of

~7 kHz with average frequency of ~100 kHz.

Auto-Restart

In the event a fault condition occurs (such as an output overload,

output short-circuit, or external component/pin fault), the

InnoSwitch3-CE enters auto-restart (AR) or latches off. The latching

condition is reset by bringing the PRIMARY BYPASS pin below ~3 V or

by going below the UNDER/OVER INPUT VOLTAGE pin UV (I

UV-)

threshold.

In auto-restart, switching of the power switch is disabled for t

AR(OFF).

There are 2 ways to enter auto-restart:

1. Continuous secondary requests at above the overload detection

frequency f

OVL (~110 kHz) for longer than 82 ms (tAR).

2. No requests for switching cycles from the secondary for >t

AR(SK).

The second is included to ensure that if communication is lost, the

primary tries to restart. Although this should never be the case in

normal operation, it can be useful when system ESD events (for

example) causes a loss of communication due to noise disturbing the

secondary controller. The issue is resolved when the primary restarts

after an auto-restart off-time.

Figure 6. Normalized Primary Current vs. Frequency.

100

Steady-State Switching Frequency (kHz)

1.05

0.8

0.75

0.85

0.9

0.95

1.0

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