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SST26WF040BT-104I/CS Datasheet(PDF) 38 Page - Microchip Technology |
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SST26WF040BT-104I/CS Datasheet(HTML) 38 Page - Microchip Technology |
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38 / 96 page ![]() SST26WF040B/040BA SST26WF080B/080BA DS20005283C-page 38 2014-2017 Microchip Technology Inc. 5.37 Global Block-Protection Unlock (ULBPR) The Global Block-Protection Unlock (ULBPR) instruc- tion clears all write-protection bits in the Block-Protec- tion register, except for those bits that have been locked down with the nVWLDR command. Execute WREN before initiating the ULBPR instruction. To execute a ULBPR instruction, the host drives CE# low, then sends the ULBPR command cycle (98H), and then drives CE# high. FIGURE 5-44: GLOBAL BLOCK- PROTECTION UNLOCK (SQI) FIGURE 5-45: GLOBAL BLOCK-PROTECTION UNLOCK (SPI) 2005283 F20.1 MODE 3 0 1 SCK SIO(3:0) CE# C1 C0 MODE 0 Note: C[1:0]=98H TABLE 5-6: BLOCK-PROTECTION REGISTER FOR SST26WF040B/040BA 1 1. The default state after a power-on reset is write-protected BPR[23:0] = 5555 FF BPR Bits Address Range Protected Block Size Read Lock Write Lock/nVWLDR2 2. nVWLDR bits are one-time-programmable. Once a WLLDR bit is set, the protection state of that particular block is permanently write-locked. 23 22 07E000H-08FFFFH 8 KByte 21 20 07C000H-07DFFFH 8 KByte 19 18 07A000H-07BFFFH 8 KByte 17 16 078000H - 079FFFH 8 KByte 15 14 006000H - 007FFFH 8 KByte 13 12 004000H - 005FFFH 8 KByte 11 10 002000H - 003FFFH 8 KByte 9 8 000000H - 001FFFH 8 KByte 7 070000H - 077FFFH 32 KByte 6 008000H - 00FFFFH 32 KByte 5 060000H - 06FFFFH 64 KByte 4 050000H - 05FFFFH 64 KByte 3 040000H - 04FFFFH 64 KByte 2 030000H - 03FFFFH 64 KByte 1 020000H - 02FFFFH 64 KByte 0 010000H - 01FFFFH 64 KByte 2005283 F68.0 MODE 3 0 1 SCK SIO0 CE# MODE 0 234567 98 SIO[3:1] |
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