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SST26WF040BT-104I/CS Datasheet(PDF) 14 Page - Microchip Technology |
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SST26WF040BT-104I/CS Datasheet(HTML) 14 Page - Microchip Technology |
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14 / 96 page ![]() SST26WF040B/040BA SST26WF080B/080BA DS20005283C-page 14 2014-2017 Microchip Technology Inc. SPI Quad PP6 SQI Quad Page Program 32H X 3 0 1 to 256 104 MHz WRSU Suspends Program/ Erase B0H X X 0 0 0 WRRE Resumes Program/ Erase 30H X X 0 0 0 Protection RBPR Read Block-Protection Register 72H X 0 0 1 to 6104 MHz X 0 1 1 to 6 WBPR Write Block-Protection Register 42H X X 0 0 1 to 6 LBPR Lock Down Block- Protection Register 8DH X X 0 0 0 nVWLDR non-Volatile Write Lock-Down Register E8H X X 0 0 1 to 6 ULBPR Global Block Protec- tion Unlock 98H X X 0 0 0 RSID Read Security ID 88H X 2 1 1 to 2048 X 2 3 1 to 2048 PSID Program User Security ID area A5H X X 2 0 1 to 256 LSID Lockout Security ID Programming 85H X X 0 0 0 Power Saving DPD Deep Power-down Mode B9H X X 0 0 0 104 MHz RDPD Release from Deep Power-down and Read ID ABH X X 3 0 1 to 0 1. Command cycle is two clock periods in SQI mode and eight clock periods in SPI mode. 2. Address bits above the most significant bit of each density can be VIL or VIH. 3. Address, Dummy/Mode bits, and Data cycles are two clock periods in SQI and eight clock periods in SPI mode. 4. RST command only executed if RSTEN command is executed first. Any intervening command will disable Reset. 5. Device accepts eight-clock command in SPI mode, or two-clock command in SQI mode. 6. Data cycles are two clock periods. IOC bit must be set to ‘1’ before issuing the command. 7. Address, Dummy/Mode bits, and data cycles are two clock periods. IOC bit must be set to ‘1’ before issuing the command. 8. Data cycles are four clock periods. 9. Address, Dummy/Mode bits, and Data cycles are four clock periods. 10. Sector Addresses: Use AMS - A12, remaining address are don’t care, but must be set to VIL or VIH. 11. Blocks are 64 KByte, 32 KByte, or 8KByte, depending on location. Block Erase Address: AMS - A16 for 64 KByte; AMS - A15 for 32 KByte; AMS - A13 for 8 KByte. Remaining addresses are don’t care, but must be set to VIL or VIH. TABLE 5-1: DEVICE OPERATION INSTRUCTIONS FOR SST26WF040B/040BA AND SST26WF080B/080BA (CONTINUED) (2 OF 2) Instruction Description Command Cycle1 Mode Address Cycle(s)2, 3 Dummy Cycle(s)3 Data Cycle(s)3 Max Freq SPI SQI |
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