SST26WF040BT-104ISLASHCS datasheet(89/96 Pages) MICROCHIP

89 / 96 page

 2014-2017 Microchip Technology Inc.

DS20005283C-page 89

SST26WF040B/040BA SST26WF080B/080BA

236H

A23:A16

C0H

Set Burst Length

237H

A31:A24

9FH

JEDEC-ID

238H

A7:A0

AFH

Quad J-ID

239H

A15:A8

5AH

SFDP

23AH

A23:A16

B9H

Deep Power-Down Mode

23BH

A31:A24

ABH

Release Deep Power-Down Mode

23CH

A4:A0

06H

(1-4-4) SPI nB Burst with Wrap Number of Wait states (dummy

clocks) needed before valid output

00110b: 6 clocks of dummy cycle

A7:A5

(1-4-4) SPI nB Burst with Wrap Number of Mode Bits

000b: Set Mode bits are not supported

23DH

A15:A8

ECH

(1-4-4) SPI nB Burst with Wrap Opcode

23EH

A20:A16

06H

(4-4-4) SQI nB Burst with Wrap Number of Wait states (dummy

clocks) needed before valid output

00110b: 6 clocks of dummy cycle

A23:A21

(4-4-4) SQI nB Burst with Wrap Number of Mode Bits

000b: Set Mode bits are not supported

23FH

A31:A24

0CH

(4-4-4) SQI nB Burst with Wrap Opcode

240H

A4:A0

00H

(1-1-1) Read Memory Number of Wait states (dummy clocks)

needed before valid output

00000b: Wait states/dummy clocks are not supported.

A7:A5

(1-1-1) Read Memory Number of Mode Bits

000b: Mode bits are not supported,

241H

A15:A8

03H

(1-1-1) Read Memory Opcode

242H

A20:A16

08H

(1-1-1) Read Memory at Higher Speed Number of Wait states

(dummy clocks) needed before valid output

01000: 8 clocks (8 bits) of dummy cycle

A23:A21

(1-1-1) Read Memory at Higher Speed Number of Mode Bits

000b: Mode bits are not supported,

243H

A31:A24

0BH

(1-1-1) Read Memory at Higher Speed Opcode

244H

A7:A0

FFH

Reserved. Bits default to all 1’s.

245H

A15:A8

FFH

Reserved. Bits default to all 1’s.

246H

A23:A16

FFH

Reserved. Bits default to all 1’s.

247H

A31:A24

FFH

Reserved. Bits default to all 1’s.

Security ID

248H

A7:A0

FFH

Security ID size in bytes

Example: If the size is 2 KBytes, this field would be 07FFH

249H

A15:A8

07H

24AH

A23:A16

FFH

Reserved. Bits default to all 1’s.

24BH

A31:A24

FFH

Reserved. Bits default to all 1’s.

TABLE 11-2:

SERIAL FLASH DISCOVERABLE PARAMETER (SFDP) SST26WF080B/080BA

(CONTINUED) (14 OF 16)

Address

Bit Address

Data

Comments

Security ID Range

Unique ID

(Pre-programmed at factory)

0000H - 0007H

User Programmable

0008H - 07FFH

SST26WF040BT-104I/CS Datasheet(PDF) 89 Page - Microchip Technology

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