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CX25871 Datasheet(PDF) 13 Page - Synaptics Incorporated. |
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CX25871 Datasheet(HTML) 13 Page - Synaptics Incorporated. |
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13 / 291 page ![]() CX25870/871 List of Tables Flicker-Free Video Encoder with Ultrascale Technology 100381B Conexant xiii List of Tables Table 1-1. Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 Table 1-2. Data Pin Assignments for Multiplexed Input Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5 Table 1-3. Data Pin Assignments for Nonmultiplexed Input Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6 Table 1-4. Maximum Programmability and Frequency Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7 Table 1-5. Autoconfiguration Solutions that Utilize 3:2 Clocking Mode . . . . . . . . . . . . . . . . . . . . . . . . 1-16 Table 1-6. Master Interface without a BLANK* Signal (Default Immediately after any Autoconfiguration Command) 1-21 Table 1-7. Master Interface with a BLANK* Input to the CX25870/871 . . . . . . . . . . . . . . . . . . . . . . . . 1-22 Table 1-8. Pseudo-Master Interface without a BLANK* Signal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-22 Table 1-9. Pseudo-Master Interface with a BLANK* Input to the CX25870/871. . . . . . . . . . . . . . . . . . 1-23 Table 1-10. Slave Interface without a BLANK* Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-23 Table 1-11. Slave Interface with a BLANK* Input to the CX25870/871 . . . . . . . . . . . . . . . . . . . . . . . . . 1-24 Table 1-12. Adjustment to the CX25870/871 MSC Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-25 Table 1-13. Adjustment to the PLL_INT and PLL_FRACT Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-26 Table 1-14. Summary of Allowable BLANK* Signal Directions by Interface. . . . . . . . . . . . . . . . . . . . . . 1-31 Table 1-15. Optimal Adaptive and Standard Flicker Filter Settings for Common PC Applications. . . . . . 1-38 Table 1-16. VGA/CRTC Registers Involved in TV Out Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-39 Table 1-17. Important Bit Settings for Various Video Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-42 Table 1-18. Composite and Luminance Amplitude. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-62 Table 1-19. Composite and Chrominance Magnitude. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-63 Table 1-20. Register Values for 640x480 / 800x600 / 1024x768 RGB In, SECAM-L Out . . . . . . . . . . . . 1-69 Table 1-21. Vital SECAM Bitsettings–Register 0xA2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-72 Table 1-22. SECAM Specific Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-74 Table 1-23. Serial Writes Required to Switch CX25870/871 into SCART Output Operation . . . . . . . . . . 1-76 Table 1-24. Default SCART Outgoing Signal Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-77 Table 1-25. CX25870 SCART Outputs for Different SCART Standards. . . . . . . . . . . . . . . . . . . . . . . . . . 1-78 Table 1-26. Common Registers Required to Switch CX25870/25871 into EIA-770.2-A- or EIA-770.1-Compli- ant Component Video Outputs 1-82 Table 1-27. Unique Registers Required to Switch CX25870/25871 into EIA-770.2-A- Compliant Component Video Outputs 1-82 Table 1-28. Serial Writes Required to Switch CX25870/871 into VGA/DAC Output Operation . . . . . . . . 1-84 Table 1-29. Serial Writes Required to Remove Bilevel Syncs from all VGA/DAC Outputs . . . . . . . . . . . 1-85 Table 1-30. ESTATUS[1:0] Read-back Bit Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-88 Table 2-1. Register Bit Map (* Indicates Read-Only Register) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 Table 2-2. Serial Address Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5 Table 2-3. Bit Map for Read-Only Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7 Table 2-4. Data Details Defined for Read-Only Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8 Table 2-5. Programming Detail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9 Table 3-1. Typical Parts List for Key Passive Components. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5 |
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