CX25871 datasheet(18/291 Pages) CONEXANT

18 / 291 page

1.0 Functional Description

CX25870/871

1.1 Pin Descriptions

Flicker-Free Video Encoder with Ultrascale Technology

1-2

Conexant

100381B

Aside from pins 2, 3, 65, 66, and 67, which are no connects within the

Bt868/869, the CX25870/871 is completely pin-to-pin compatible with

Conexant’s first generation VGA encoder.

Table 1-1. Pin Assignments (1 of 3)

Pin Name

I/O

Pin #

Description

VAA_VREF

—

Analog power. All VAA and VDD pins must be connected together on the same

PCB plane to prevent latchup.

AGND

—

Analog ground. All AGND and VSS pins must be connected together on the

same PCB plane to prevent latchup.

FSADJUST

Full-scale adjust control pin. A resistor (RSET) connected between this pin and

GND controls the full-scale output current on the analog outputs.

VBIAS

DAC bias voltage. A 0.1

µF ceramic capacitor must be used to bypass this pin to

GND. The capacitor must be as close to the device as possible to keep lead

lengths to an absolute minimum.

VREF

Voltage reference pin. A 1.0

µF ceramic capacitor must be used to decouple this

pin to GND. The decoupling capacitor must be as close to the device as possible

to keep lead lengths to an absolute minimum.

COMP

Compensation pin. A 0.1

µF ceramic capacitor must be used to bypass this pin

to VAA. The capacitor must be as close to the device as possible to keep lead

lengths to an absolute minimum.

VAA_DACC

—

DACC Analog power. All VAA and VDD pins must be connected together on the

same PCB plane to prevent latchup.

DACC

DACC Analog output.

VAA_DACB

—

DACB Analog power. All VAA and VDD pins must be connected together on the

same PCB plane to prevent latchup.

DACB

DACB Analog output.

VAA_DACA

—

DACA Analog power. All VAA and VDD pins must be connected together on the

same PCB plane to prevent latchup.

DACA

DACA Analog output.

VAA_DACD

—

DACD analog power. All VAA and VDD pins must be connected together on the

same PCB plane to prevent latchup.

DACD

DACD analog output. If unused, DACD should be left as a no connect.

AGND_DAC

—

65, 74

Common DAC Analog ground return. All AGND and VSS pins must be

connected together on the same PCB plane to prevent latchup.

VSS_X

—

Crystal oscillator ground pin. This pin should be tied to the ground plane.

XTALIN

A crystal can be connected to these pins. The pixel clock output (CLKO) is

derived from these pins with a PLL. XTALIN can be driven as a CMOS input pin.

Internally, this is a CMOS inverter tying XTALOUT to XTALIN. If XTALOUT is

unused, it should be left as a no connect.

XTALOUT

VDD_X

—

Crystal oscillator supply pin. This pin should be tied to the power supply.

VAA_PLL

—

Analog power for PLL. All VAA and VDD pins must be connected together on the

same PCB plane to prevent latchup.

AGND_PLL

—

Analog ground for PLL. All AGND and VSS pins must be connected together on

the same PCB plane to prevent latchup.

CX25871 Datasheet(PDF) 18 Page - Synaptics Incorporated.

CX25871 Datasheet(HTML) 18 Page - Synaptics Incorporated.

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