LP2989LV datasheet(5/11 Pages) NSC

5 / 11 page

Electrical Characteristics (Continued)

Limits in standard typeface are for T

J = 25˚C, and limits in boldface type apply over the full operating temperature range. Un-

less otherwise specified: V

IN =VO(NOM) + 1V, IL = 1 mA, COUT = 10 µF, CIN = 2.2 µF, VS/D = 2V.

Symbol

Parameter

Conditions

Typical

LP2989AI-X.X

(Note 6)

LP2989I-X.X

(Note 6)

Units

Min

Max

Min

Max

SHUTDOWN INPUT

S/D

S/D Input Voltage

H = O/P ON

1.4

1.6

L = O/P OFF

≤ 2µA

0.50

0.18

S/D

S/D Input Current

S/D = 0

0.001

−1

µA

S/D =5V

ERROR COMPARATOR

Output “HIGH” Leakage

OH = 16V

0.001

µA

Output “LOW” Voltage

OUT =VO(NOM) − 0.5V

O(COMP) = 150 µA

150

220

350

THR

(MAX)

Upper Threshold

Voltage

−4.8

−6.0

−3.5

−6.0

−3.5

OUT

−8.3

−2.5

−8.3

−2.5

THR

(MIN)

Lower Threshold

Voltage

−6.6

−8.9

−4.9

−8.9

−4.9

−13.0

−3.0

−13.0

−3.0

HYST

Hysteresis

2.0

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the

device outside of its rated operating conditions.

Note 2: ESD testing was performed using Human Body Model, a 100 pF capacitor discharged through a 1.5 k

Ω resistor.

Note 3: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJ−A,

and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated using:

The value of

θJ−A for the SO-8 (M) package is 160˚C/W and the mini SO-8 (MM) package is 200˚C/W. The value θJ−A for the LLP (LD) package is specifically

dependent on PCB trace area, trace material, and the number of layers and thermal vias. For improved thermal resistance and power dissipation for the LLP

package, refer to Application Note AN-1187.Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into

thermal shutdown.

Note 4: If used in a dual-supply system where the regulator load is returned to a negative supply, the LP2989LV output must be diode-clamped to ground.

Note 5: The output PNP structure contains a diode between the VIN and VOUT terminals that is normally reverse-biased. Forcing the output above the input will turn

on this diode and may induce a latch-up mode which can damage the part (see Application Hints).

Note 6: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control

(SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL).

Note 7: Temperature coefficient is defined as the maximum (worst-case) change divided by the total temperature range.

Note 8: See Typical Performance Characteristics curves.

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