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74F598 Datasheet(PDF) 8 Page - NXP Semiconductors |
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74F598 Datasheet(HTML) 8 Page - NXP Semiconductors |
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8 / 14 page ![]() Philips Semiconductors Product specification 74F598 8-bit shift register with input storage registers (3-State) 1991 Oct 21 8 AC SETUP REQUIREMENTS LIMITS Tamb = +25°C Tamb = 0°C to +70°C SYMBOL PARAMETER TEST VCC = +5.0V VCC = +5.0V ± 10% UNIT CONDITION CL = 50pF, RL = 500Ω CL= 50pF, RL = 500Ω MIN TYP MAX MIN MAX ts (H) ts (L) Setup time, High or Low Dsn to SHCP Waveform 3 0.0 3.5 1.5 4.5 ns th (H) th (L) Hold time, High or Low DSn to SHCP Waveform 3 0.0 2.5 0.0 3.0 ns ts (H) ts (L) Setup time, High or Low I/On to STCP Waveform 3 2.5 2.5 2.5 3.0 ns th (H) th (L) Hold time, High or Low I/On to STCP Waveform 3 0.0 0.0 1.5 2.0 ns ts (H) ts (L) Setup time, High or Low S to SHCP Waveform 3 3.5 3.0 4.0 3.5 ns th (H) th (L) Hold time, High or Low S to SHCP Waveform 3 2.5 3.0 3.0 3.0 ns ts (H) Setup time, High, STCP to SHLD Waveform 4 7.0 8.0 ns th (L) Hold time, Low, STCP to SHLD (hold mode) Waveform 4 0.0 0.0 ns ts (H) ts (L) Setup time, High or Low, SHCPEN to SHCP Waveform 3 0.0 2.0 0.0 2.0 ns th (H) th (L) Hold time, High or Low, SHCPEN to SHCP Waveform 3 0.0 4.5 0.0 5.5 ns ts (H) Setup time, High, SHLD to SHCP ↑ Waveform 3 7.5 8.5 ns tw (H) tw (L) SHCP Pulse width, High or Low Waveform 1 5.5 4.0 6.5 4.0 ns tw (H) tw (L) STCP Pulse width, High or Low Waveform 1 4.5 4.0 5.5 4.0 ns tw (L) SHRST Pulse width, Low Waveform 1 4.0 4.0 ns tw (L) SHLD Pulse width, Low Waveform 1 4.0 5.0 ns trec Recovery time, SHRST to SHCP Waveform 2 0.0 0.0 ns |
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