Altera Corporation

13

EP220 & EP224 Classic EPLDs

AC Operating Conditions: -7A, -10A, & -12 Speed Grades

Note (1)

Notes to tables:

(1)

(2)

If the device enters standby mode and remains inactive for approximately 75 ns, increase the time by the amount

shown. For EP220-10A, EP220-12, and EP224-10A, EP224-12 devices only.

(3)

Measured with all outputs switching.

(4)

Combinatorial Mode

EP220-7A

EP224-7A

EP220-10A

EP224-10A

EP220-12

EP224-12

Non-Turbo

Adder

Symbol

Parameter

Min Max Min Max Min Max

Note (2) Units

Input to non-registered output,

Note (3)

7.5

10

12

20

ns

I/O to non-registered output,

Note (3)

7.5

10

12

20

ns

Input or I/O to output enable,

Note (4)

912

12

20

ns

Input or I/O to output disable,

Note (4)

910

12

20

ns

Register-mode output to output skew

300

-

-

-

ps

Combinatorial-mode output to output skew

400

-

-

-

ps

Synchronous Clock Mode

EP220-7A

EP224-7A

EP220-10A

EP224-10A

EP220-12

EP224-12

Non-Turbo

Adder

Symbol

Parameter

Min Max Min Max Min Max

Note (2)

Units

Maximum frequency (pipelined), no feedback,

Note (3)

115

111

90.9

-

MHz

Maximum counter frequency, external feedback,

Note (3)

100

80

66

-

MHz

Maximum counter frequency, internal feedback,

Note (3)

115

100

83.3

-

MHz

Input or I/O setup time to global clock

4.5

7

9

20

ns

Input or I/O hold time from global clock

0

0

0

0

ns

Global clock to output delay,

Note (3)

5.5

5.5

6

0

ns

Global clock to output delay through combinatorial

macrocell

10

13

15

20

ns

Minimum global clock period,

Note (3)

10

10

12

20

ns

Clock low time

4

4

5

0

ns

Clock high time

4

4

5

0

ns

Clock period

10

9

11

0

ns