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74HC7404D Datasheet(PDF) 7 Page - NXP Semiconductors |
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74HC7404D Datasheet(HTML) 7 Page - NXP Semiconductors |
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7 / 28 page  September 1993 7 Philips Semiconductors Product specification 5-Bit x 64-word FIFO register; 3-state 74HC/HCT7404 AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF. SYMBOL PARAMETER Tamb °C UNIT TEST CONDITION +25 −40 to +85 −40 to +125 VCC (V) WAVEFORMS MIN TYP MAX MIN MAX MIN MAX tPHL/tPLH propagation delay MR to DIR, DOR − − − 69 25 20 210 42 36 − − − 265 53 45 − − − 315 63 54 ns ns ns 2.0 4.5 6.0 Fig.9 tPHL propagation delay MR to Qn − − − 52 19 15 160 32 27 − − − 200 40 34 − − − 240 48 41 ns ns ns 2.0 4.5 6.0 Fig.9 tPHL/tPLH propagation delay SI to DIR − − − 66 24 19 205 41 35 − − − 255 51 43 − − − 310 62 53 ns ns ns 2.0 4.5 6.0 Fig.7 tPHL/tPLH propagation delay SO to DOR − − − 94 34 27 290 58 49 − − − 365 73 62 − − − 435 87 74 ns ns ns 2.0 4.5 6.0 Fig.10 tPHL/tPLH propagation delay DOR to Qn − − − 11 4 3 35 7 6.0 − − − 45 9 8 − − − 55 11 9 ns ns ns 2.0 4.5 6.0 Fig.11 tPHL/tPLH propagation delay SO to Qn − − − 105 38 30 325 65 55 − − − 406 81 69 − − − 488 98 83 ns ns ns 2.0 4.5 6.0 Fig.15 tPLH propagation delay/ripple through delay SI to DOR − − − 2.2 0.8 0.6 7.0 1.4 1.2 − − − 8.8 1.8 1.5 − − − 10.5 2.1 1.8 µs µs µs 2.0 4.5 6.0 Fig.16 tPLH propagation delay/bubble-up delay SO to DIR − − − 2.8 1.0 0.8 9.0 1.8 1.5 − − − 11.2 2.2 1.9 − − − 13.5 2.7 2.3 µs µs µs 2.0 4.5 6.0 Fig.8 tPZH/tPZL 3-state output enable OE to Qn − − − 44 16 13 150 30 26 − − − 190 38 32 − − − 225 45 38 ns ns ns 2.0 4.5 6.0 Fig.17 tPHZ/tPLZ 3-state output disable OE to Qn − − − 50 18 14 150 30 26 − − − 190 38 33 − − − 225 45 38 ns ns ns 2.0 4.5 6.0 Fig.17 tTHL/tTLH output transition time − − − 14 5 4 60 12 10 − − − 75 15 13 − − − 90 18 15 ns ns ns 2.0 4.5 6.0 Fig.17 tW SI pulse width HIGH or LOW 35 7 6 11 4 3 − − − 45 9 8 − − − 55 11 9 − − − ns ns ns 2.0 4.5 6.0 Fig.7 tW SO pulse width HIGH or LOW 70 14 12 22 8 6 − − − 90 18 15 − − − 105 21 18 − − − ns ns ns 2.0 4.5 6.0 Fig.10 |
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