DS3131 datasheet(21/33 Pages) DALLAS

Part #	DS3131

Description	Bit-SynchronouS (BoSS) HDLC Controller Demo Kit

PDF	33 Pages

Scroll/Zoom	100%

Manufacturer	DALLAS [Dallas Semiconductor]

Direct Link	https://www.maximintegrated.com/en.html

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21 / 33 page

DS3131DK

21 of 33

Descriptions of Receive DMA

Buffer

Large: RLBS register; maximum value = 0x1fff

Small: RSBS register; maximum value = 0x1fff

Offset: Receive DMA configuration RAM, dword2, bits 3–6

Size Select: Receive DMA configuration RAM dword2, bits 1 and 2

Free Queue

Large: Size of free queue for large buffer

Buffer in Queue: Number of buffers to put into the free queue

Small: Size of free queue for large buffer

Buffer in Queue: Number of buffers to put into the free queue

Maximum value of the free queue = 0x10000 (large + small)

FIFO: Enable/disable FIFO (RDMAQ, bit 0)

Done Queue

Size: Size of receive done queue, maximum value = 0x10000

FIFO: Enable/disable FIFO (RDMAQ, bit 4)

Flush Timer: RDQFFT, maximum value = 0xffff

Threshold: Receive DMA configuration RAM, dword2, bits 7–9

Control Descriptions

The DMA settings are updated with the value from all fields.

SaveFile

Saves all the information from the GUI into a file.

Default

Restores all fields to BoSS default values.

DS3131 Datasheet(PDF) 21 Page - Dallas Semiconductor