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MAX22196

Octal Industrial Sink/Source

Digital Input

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generates the VA supply when the REGEN pin is open. The REGEN pin should be connected to GND when supplying

VA from an external supply in the range of 3.0V to 5.5V.

When powering the MAX22196 from an external 3.3V or 5V supply on VA, V24 must be powered by external 24V supply.

If the MAX22196 is only operated in sink or TTL configurations, V24 can be powered by the external VA supply, and a

24V supply is not needed.

The advantage of powering the MAX22196 from an external 5V supply on VA is to remove the LDO power dissipation

from the 24V field supply. The advantage of powering the MAX22196 from the V24 field supply is that if the system thermal

shutdown (OTSHDN2 bit in the FAULT2 register) occurs, register contents are not lost. See the SPI Power Status section

for details.

The VL supply is the logic interface supply in the range of 2.5V to 5.5V. Make sure VL is always lower than or equal to

VA.

READY Logic

The MAX22196 features a READY signal to indicate that the MAX22196 has been powered properly and is ready for

normal operation. READY asserts low when both VA analog supply and VL logic I/O supply are both above their respective

UVLO thresholds. READY is an open-drain high-side output that needs a pulldown resistor. Note that READY is not

associated with the VM comparator.

V24 < V24_UVLO

READY

TIMER 1ms

REGEN

VL > VL_UVLO

VA > VA_UVLO

Figure 5. READY Logic

VMOK Supply Monitoring

The MAX22196 features a comparator that can be used to monitor and provide visual indication of the state of a power

supply or other voltage. Connecting VM to an external resistor-divider defines the threshold voltage. VMOK is a high-

voltage open-drain output that can drive an LED through a current-limiting resistor. The VM comparator generates three

outputs, the VMOK signal, the VMLOW bit in the FAULT1 register, LED9 when LO_ pins are configured as LED matrix

and the LEDs are controlled autonomously by the MAX22196 internal logic. See GLOBLCFG register for details.

The VMOK signal is not used with the READY indication. This allows the VMOK threshold to be set differently from the

internal V24_UVLO thresholds.

Fault Detection and Monitoring

FAULT is a low-side open-drain output that can be wire ORed with other open-drain outputs and be used to notify the

host processor of a fault. When enabled, FAULT goes low to indicate that one or more of the flags in the FAULT1 register

have been set. These faults are as follows: VM comparator trip (VMLOW), V24 undervoltage alarm (V24UV), over-

temperature alarm (TEMPALM), thermal shutdown (OTSHDN1), CRC error detected on the previous SPI frame

(CRCERR), a POR occurred, or an unmasked bit in the FAULT2 register is set.

Mask bits in the F1MASK and F2MASK registers select which flags in the FAULT1 and FAULT2 registers assert the

FAULT pin. The mask bits do not affect the flags in the FAULT1 register; they only affect the FAULT pin. All bits in the

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