6.42

70V261S/L

High-Speed 16K x 16 Dual-Port Static RAM with Interrupt

Industrial and Commercial Temperature Ranges

13

Jun.04.21

NOTES:

1. Pins BUSYL and BUSYR are both outputs when the part is configured as a master. Both are inputs when configured as a slave. BUSYX outputs on the IDT70V261 are push

pull, not open drain outputs. On slaves the BUSYX input internally inhibits writes.

2. L if the inputs to the opposite port were stable prior to the address and enable inputs of this port. VIH if the inputs to the opposite port became stable after the address and

enable inputs of this port. If tAPS is not met, either BUSYL or BUSYR = LOW will result. BUSYL and BUSYR outputs cannot be LOW simultaneously.

3. Writes to the left port are internally ignored when BUSYL outputs are driving LOW regardless of actual logic level on the pin. Writes to the right port are internally ignored when

BUSYR outputs are driving LOW regardless of actual logic level on the pin.

Truth Table IV —

Address BUSY Arbitration

Truth Table V — Example of Semaphore Procurement Sequence(1,2,3)

NOTES:

1. This table denotes a sequence of events for only one of the eight semaphores on the IDT70V261.

2. There are eight semaphore flags written to via I/O0 and read from all I/O's (I/O0-I/O15). These eight semaphores are addressed by A0-A2.

3. CE = VIH, SEM = VIL to access the semaphore. Refer to the Semaphore Read/Write Control Truth Table.

Truth Table III — Interrupt Flag(1)

NOTES:

1. Assumes BUSYL = BUSYR =VIH.

2. If BUSYL = VIL, then no change.

3. If BUSYR = VIL, then no change.

Left Port

Right Port

Function

R/WL

CEL

OEL

A13L-A0L

INTL

R/WR

CER

OER

A13R-A0R

INTR

L

L

X

3FFF

X

X

X

X

X

L(2)

Set Right INTR Flag

X

X

XXX

X

L

L

3FFF

H(3)

Reset Right INTR Flag

XX

X

X

L(3)

L

L

X

3FFE

X

Set Left INTL Flag

X

L

L

3FFE

H(2)

X

X

XXX

Reset Left INTL Flag

3040 tbl 15

Inputs

Outputs

Function

CEL

CER

A0L-A13L

A0R-A13R

BUSYL(1)

BUSYR(1)

X

X

NO MATCH

H

H

Normal

H

X

MATCH

H

H

Normal

X

H

MATCH

H

H

Normal

L

L

MATCH

(2)

(2)

Write Inhibit(3)

3040 tbl 16

Functions

D0 - D15 Left

D0 - D15 Right

Status

No Action

1

1

Semaphore free

Left Port Writes "0" to Semaphore

0

1

Left port has semaphore token

Right Port Writes "0" to Semaphore

0

1

No change. Right side has no write access to semaphore

Left Port Writes "1" to Semaphore

1

0

Right port obtains semaphore token

Left Port Writes "0" to Semaphore

1

0

No change. Left port has no write access to semaphore

Right Port Writes "1" to Semaphore

0

1

Left port obtains semaphore token

Left Port Writes "1" to Semaphore

1

1

Semaphore free

Right Port Writes "0" to Semaphore

1

0

Right port has semaphore token

Right Port Writes "1" to Semaphore

1

1

Semaphore free

Left Port Writes "0" to Semaphore

0

1

Left port has semaphore token

Left Port Writes "1" to Semaphore

1

1

Semaphore free

3040 tbl 17