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DA7282 Datasheet(PDF) 86 Page - Renesas Technology Corp

Part # DA7282
Description  LRA/ERM Ultra-Low Power Haptic Driver with Multiple Input Triggers and Integrated Waveform Memory
PDF  88 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

DA7282 Datasheet(HTML) 86 Page - Renesas Technology Corp

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DA7282
LRA/ERM Ultra-Low Power Haptic Driver with
Multiple Input Triggers and Integrated
Waveform Memory
Datasheet
Revision 3.1
10-Feb-2022
CFR0011-120-00
86 of 87
© 2022 Renesas Electronics
Revision History
Revision
Date
Description
3.1
10-Feb-2022
Updated logo, disclaimer, copyright.
3.0
30-Jul-2019
Final datasheet
Change details:
● Renamed EN to VDDIO/EN throughout the document to better describe the purpose of the pin
● Table 1: Added DA7283 details
● Section 2 Pinout
○ Formatting changes to merge tables and use space better
● Section 4.3 Electrical Characteristics
○ Table 8 Added parameter VDD_POR_FALL
● Sections 5.2.5, 5.2.7, 5.6.5.3 and Tables 56 and 57 in Section 6.2:
○ Corrected pin name errors (ADDR to GPI)
● Section 5.1 Features Description
○ Minor rewording to better describe part (also reflected on front page)
● Section 5.7.1: Frequency Tracking
○ Added sentences regarding use of SmartCanvas GUI to adjust Kp and Ki coefficients
○ Added sentence regarding checking stability of closed loop to step response when optimizing Kp and
Ki coefficients with FREQ_TRACK_AUTO_ADJ enabled
● Section 5.7.1.9: VDDIO/EN Pin Control
○ Clarified description
● Section 5.8: Waveform Memory
○ Added note recommending SmartCanvas GUI is used to construct and upload WM sequences
● Section 5.8.1: Waveform Memory Structure
○ Figure 26: Replaced Sequence 1 with Sequence 0 and clarification of explanation
● Section 5.8.2: Snippet Definition
○ Clarification of TIME and AMP definitions
○ Added note to explain snippet 0
● Section 5.8 3: Frame Definition
○ Clarified Byte 1 and Byte 2 definitions
○ Clarified SNP_ID_LOOP [3:0] definition
○ Added notes explaining updating of frequencies
● Section 5.8.4: Sequence Definition
○ Further clarification of sequences
○ Figure 30: Replaced Sequence 1 with Sequence 0
● Section 5.9.1: DRO Mode
○ Clarification of full range
● Section 5.9.3: RTWM and ETWM Modes
○ Clarification of full range
● Section 6: Register Overview
○ Reset values (and associated descriptions) updates for the following addresses: 0x00, 0x0A, 0x0B,
0x0C, 0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x1C, 0x1D, 0x1E, 0x1F, 0x20, 0x2C, 0x46, 0x47, and 0x5F
● Section 7: Package Information
○ Updated both WLCSP and QFN package outline diagrams to rev E (only change is to title)
● Section 9: Application Information



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