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AD7142

Rev. 0 | Page 26 of 68

STAGE0

STAGE1

STAGE2

STAGE3

STAGE4

STAGE5

STAGE6

STAGE7

STAGE8

STAGE9

STAGE10

STAGE11

INT

CONVERSIONS

SERIAL

READS

NOTES

THIS IS AN EXAMPLE OF A CDC CONVERSION COMPLETE INTERRUPT.

THIS TIMING EXAMPLE SHOWS THAT THE INTERRUPT OUTPUT HAS BEEN ENABLED TO BE ASSERTED AT THE END OF A CONVERSION CYCLE FOR

STAGE0, STAGE5, AND STAGE9. THE INTERRUPTS FOR ALL OTHER STAGES HAVE BEEN DISABLED.

STAGEx CONFIGURATION PROGRAMMING NOTES FOR STAGE0, STAGE5, AND STAGE9 (x = 0, 5, 9)

STAGEx_LOW_INT_EN (ADDRESS 0x005) = 0

STAGEx_HIGH_INT_EN (ADDRESS 0x006) = 0

STAGEx_COMPLETE_EN (ADDRESS 0x007) = 1

STAGEx CONFIGURATION PROGRAMMING NOTES FOR STAGE 1 THROUGH STAGE 8, STAGE10, AND STAGE11 (x = 1, 2, 3, 4, 5, 6, 7, 8, 10, 11)

STAGEx_LOW_INT_EN (ADDRESS 0x005) = 0

STAGEx_HIGH_INT_EN (ADDRESS 0x006) = 0

STAGEx_COMPLETE_EN (ADDRESS 0x007) = 0

SERIAL READBACK REQUIREMENTS FOR STAGE0, STAGE5 AND STAGE9. THIS READBACK OPERATION IS REQUIRED TO CLEAR THE INTERRUPT OUTPUT.

1. READ THE STAGE0_COMPLETE_STATUS_INT (ADDRESS 0x00A) REGISTER

2. READ THE STAGE5_COMPLETE_STATUS_INT (ADDRESS 0x00A) REGISTER

3. READ THE STAGE9_COMPLETE_STATUS_INT (ADDRESS 0x00A) REGISTER

Figure 36. Example of Configuring the Registers for End of Conversion Interrupt Setup

INT

CONVERSIONS

SERIAL

READS

NOTES

THIS IS AN EXAMPLE OF A SENSOR THRESHOLD INTERRUPT FOR A CASE WHERE THE LOW THRESHOLD LEVELS WERE EXCEEDED.

FOR EXAMPLE: THE SENSOR CONNECTED TO STAGE0 AND STAGE9 WERE CONTACTED AND THE LOW THRESHOLD LEVELS WERE EXCEEDED RESULTING

IN THE INTERRUPT BEING ASSERTED. THE STAGE6 INTERRUPT WAS NOT ASSERTED BECAUSE THE USER DID NOT CONTACT THE SENSOR CONNECTED TO

STAGE6.

STAGEx CONFIGURATION PROGRAMMING NOTES FOR STAGE 0, STAGE6, AND STAGE9 (x = 0, 6, 9)

STAGEx_LOW_INT_EN (ADDRESS 0x005) = 1

STAGEx_HIGH_INT_EN (ADDRESS 0x006) = 0

STAGEx_COMPLETE_EN (ADDRESS 0x007) = 0

STAGEx CONFIGURATION PROGRAMMING NOTES FOR STAGE 1 THROUGH STAGE7, STAGE8, STAGE10, AND STAGE11 (x = 1, 2, 3, 4, 5, 6, 7, 8, 10, 11)

STAGEx_LOW_INT_EN (ADDRESS 0x005) = 0

STAGEx_HIGH_INT_EN (ADDRESS 0x006) = 0

STAGEx_COMPLETE_EN (ADDRESS 0x007) = 0

SERIAL READBACK REQUIREMENTS FOR STAGE0 AND STAGE9. THIS READBACK OPERATION IS REQUIRED TO CLEAR THE INTERRUPT OUTPUT.

1. READ THE STAGE0_LOW_LIMIT_INT (ADDRESS 0x008) REGISTER

2. READ THE STAGE5_LOW_LIMIT_INT (ADDRESS 0x008) REGISTER

STAGE0

STAGE1

STAGE2

STAGE3

STAGE4

STAGE5

STAGE6

STAGE7

STAGE8

STAGE9

STAGE10

STAGE11

Figure 37. Example of Configuring the Registers for Sensor Interrupt Setup

AD7142 Datasheet(PDF) 26 Page - Analog Devices

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