Functional description

L6572

10/22

Doc ID 023882 Rev 1

5

Functional description

5.1

Signal processing block

The resonant current is detected with a shunt resistor which delivers a voltage signal to the

SENSE pin that is related to the GND pin.

Voltages at the SENSE pin amount to approx. 400 mV(rms) during normal operation

respectively up to 10 V(peak) during ignition.

An overriding of the amplifier is given by sense voltages above ± 4.5 V.

5.2

Current regulation

This block provides the lamp current regulation. It consists of one integrator that loads an

internal capacity (Cint) with a current that is directly proportional (factor: Rint1) to the signal

at the sense input. The output of the integrator is (T1/2 stands for "LVG or HVG MOSFET"):

Equation 1

(t = 0: T1/2 switched on; t =

τ : T1/2 switched off).

The output signal of the integrator Vint is compared to the rated value (rated resonant

current) programmed by RNO, RPH or RDO depending on the operational phase; the

relevant comparator triggers the output stage block that switches off the current conducting

power transistor.

The internal capacitor Cint is reset during the deadtime of the half-bridge (programmed by

RDT).

5.3

ZVS control

Thanks to the implemented ZVS control function, the conducting transistor is switched off at

the latest when the resonant current changes its direction. Therefore, the half-bridge

operates in the inductive region of the resonance characteristics of the ballast. In the worst

case, working close to the pole frequency is allowed.

5.4

Two-step dimming

The ballast operates the lamps with nominal or reduced light output. A change between

these two operation modes is achieved by disconnecting the line voltage for a time t < tTSD.

An internal binary information cell changes its state at the end of every preheating phase.

Depending on the state of this cell, the reduced or the nominal rated resonant current is

given to the current regulation unit in order to operate the lamp with nominal or reduced light

output.

V

int

1

R

int

C

int

⋅

---------------------------

V

SENSE t

() t

d

0

τ

∫

⋅

=