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HC5526 Datasheet(PDF) 10 Page - Renesas Technology Corp |
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HC5526 Datasheet(HTML) 10 Page - Renesas Technology Corp |
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10 / 19 page ![]() HC5526 FN4151 Rev 8.00 Page 10 of 19 August 2003 For loop resistances that result in a tip to ring voltage less than the saturation guard voltage the loop current is defined as: where: IL = Constant loop current. RDC1 and RDC2 = Loop current programming resistors. Capacitor CDC between RDC1 and RDC2 removes the VF signals from the battery feed control loop. The value of CDC is determined by Equation 2: where T = 30ms. The minimum CDC value is obtained if RDC1 = RDC2. Figure 14 illustrates the relationship between the tip to ring voltage and the loop resistance. For a 0 loop resistance both tip and ring are at VBAT/2. As the loop resistance increases, so does the voltage differential between tip and ring. When this differential voltage becomes equal to the saturation guard voltage, the operation of the SLIC’s loop feed changes from a constant current feed to a resistive feed. The loop current in the resistive feed region is no longer constant but varies as a function of the loop resistance. Figure 15 shows the relationship between the saturation guard voltage, the loop current and the loop resistance. Notice from Figure 15 that for a loop resistance <1.2k (RSG = 21.4k) the SLIC is operating in the constant current feed region and for resistances >1.2k the SLIC is operating in the resistive feed region. Operation in the resistive feed region allows long loop and off-hook transmission by keeping the tip and ring voltages off the rails. Operation in this region is transparent to the customer. The Saturation Guard circuit (Figure 13) monitors the tip to ring voltage via the transconductance amplifier A1. A1 generates a current that is proportional to the tip to ring voltage difference. I1 is internally set to sink all of A1’s current until the tip to ring voltage exceeds 12.5V. When the tip to ring voltage exceeds 12.5V (with no RSG resistor) A1 supplies more current than I1 can sink. When this happens A2 amplifies its input current by a factor of 12 and the current through R1 becomes the difference between I2 and the output current from A2. As the current from A2 increases, the voltage across R1 decreases and the output voltage on RDC decreases. This results in a corresponding decrease in the loop current. The RSG pin provides the ability to increase the saturation guard reference voltage beyond 12.5V. Equation 3 gives the relationship between the RSG HC5526 VTX RRX RDC1 RDC2 CDC RSN RDC IRSN TIP RING -2.5V IRING ITIP A2 ITIP IRING RSG RSG -5V LOOP CURRENT CIRCUIT SATURATION GUARD CIRCUIT A1 I1 I2 R1 + - + - + - + - -5V FIGURE 13. DC LOOP CURRENT -5V IL 2.5V RDC1 RDC2 + -------------------------------------- 1000 = (EQ. 1) CDC T 1 RDC1 --------------- 1 RDC2 --------------- + = (EQ. 2) 01.2K -50 -40 -30 -20 -10 0 VBAT = -48V, IL = 23mA, RSG = 21.4k LOOP RESISTANCE ( ) VTIP VRING RESISTIVE FEED REGION CONSTANT CURRENT FEED REGION SATURATION GUARD VOLTAGE SATURATION GUARD VOLTAGE FIGURE 14. VTR vs RL 0 10 20 30 0 10 20 30 40 50 LOOP CURRENT (mA) VBAT = -24V, RSG = VBAT = -48V, RSG = 21.4k SATURATION GUARD RESISTIVE FEED REGION CONSTANT CURRENT FEED REGION RRSG = 21.4k 100k 100k 4k 1.5k 2k 700 <400 <1.2k RL RL RRSG = VOLTAGE, VTR = 38V SATURATION GUARD VOLTAGE, VTR = 13V FIGURE 15. VTR vs IL and RL |
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