6 Specifications

6.1 Absolute Maximum Ratings

over operating temperature range (unless otherwise noted)((1))

MIN

MAX

UNIT

Input voltage, VI (for legacy chip)

UA78L02AC, UA78L05C, UA78L09C, and UA78L10AC

30

V

UA78L12C, UA78L12AC, UA78L15C, and UA78L15AC

35

Input voltage, VI (for new chip)

UA78L00AC, UA78L00C and UA78L00AI

45

Junction temperature, TJ

150

°C

Storage temperature, Tstg

–65

150

°C

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)

1000

V

Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2)

1000

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)

MIN

TYP

MAX

UNIT

VI

Input voltage

UA78L02AC (for legacy chip only)

4.75

20

V

UA78L033AC (for new chip only)

4.75

20

UA78L05C and UA78L05AC (for both

legacy and new chip)

7

20

UA78L06C and UA78L06AC (for legacy

chip only)

8.5

20

UA78L08C and UA78L08AC (for legacy

chip only)

10.5

23

UA78L09C and UA78L09AC (for legacy

chip only)

11.5

24

UA78L10AC (for legacy chip only)

12.5

25

UA78L12C and UA78L12AC (for both

legacy and new chip)

14.5

27

UA78L15C and UA78L15AC (for both

legacy and new chip)

17.5

30

IO

Output current

100

mA

CIN(2)

Input capacitor (3)

0.33

µF

COUT(2)

Output capacitor ((4))

0.1

TJ

Operating junction temperature

UA78L00C and UA78L00AC series (for

legacy chip)

0

125

°C

UA78L05AI (for legacy chip)

–40

125

UA78L00C , UA78L00AC and UA78L05AI

series (for new chip)

–40

125

(1)

All voltages are with respect to GND.

(2)

UA78L00 regulator doesn't need any external capacitors for the the LDO stability.

(3)

An input capacitor with value of 0.33 μF is recommended to counteract the effect of source resistance and inductance, which may in

some cases cause symptoms of system level instability such as ringing or oscillation, especially in the presence of load transients.

(4)

An output capacitor with value of 0.1 μF is rrecommended to improve the load and line transient performance of the UA78L00

regulator.

UA78L

SLVS010W – JANUARY 1976 – REVISED APRIL 2023

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