6.7 Electrical Characteristics: UA78L05 (for both legacy and new chip) (continued)

at specified junction temperature, VI = 10 V, CIN = 0.33 µF, COUT = 0.1µF and IO = 40 mA (unless otherwise noted)((1))

PARAMETER

TEST CONDITIONS(2)

MIN

TYP

MAX

UNIT

Ripple rejection

VI = 8 V to 18 V, f = 120 Hz,

and TJ = 25°C (for legacy chip)

UA78L05C

40

49

dB

UA78L05AC and UA78L05AI

41

49

VI = 8 V to 18 V, f = 120 Hz,

and TJ = 25°C (for new chip)

UA78L05C

48

49

UA78L05AC and UA78L05AI

48

49

Output voltage

regulation

for legacy chip

IO = 1 mA to 100 mA, and TJ = 25°C

15

60

mV

IO = 1 mA to 40 mA, and TJ = 25°C

8

30

for new chip

IO = 1 mA to 100 mA, and TJ = 25°C

15

35

IO = 1 mA to 40 mA, and TJ = 25°C

8

15

Output noise voltage

for legacy chip

f = 10 Hz to 100 kHz, and TJ = 25°C

42

μV

for new chip

f = 10 Hz to 100 kHz, and TJ = 25°C

42

Dropout voltage

for legacy chip

TJ = 25°C

1.7

V

for new chip

1.7

V

Bias current

for legacy chip

TJ = 25°C

3.8

6

mA

TJ = 125°C

5.5

mA

for new chip

TJ = 25°C

3.53

3.95

mA

TJ = 125°C

4.0

Bias current change

VI = 8 V to 20 V, and TJ = full range (for new legacy chip)

1.5

mA

IO = 1 mA to 40 mA, and

TJ = full range (for legacy chip)

UA78L05C

1.5

mA

UA78L05AC and UA78L05AI

1.5

mA

VI = 8 V to 20 V, and TJ = full range (for new chip)

0.485

mA

IO = 1 mA to 40 mA, and

TJ = full range (for new chip)

UA78L05C

0.01

UA78L05AC and UA78L05AI

0.01

(1)

Applies to UA78L05C, UA78L05AC and UA78L05AI.

(2)

Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. For legacy

chip, temperature range for the UA78L05C, UA78L05AC is TJ = 0°C to 125°C, and for the UA78L05AI is TJ = –40°C to 125°C. For new

chip, temperature range for the UA78L05C, UA78L05AC and UA78L05AI is TJ = –40°C to 125°C.

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UA78L

SLVS010W – JANUARY 1976 – REVISED APRIL 2023

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