6.12 Electrical Characteristics: UA78L10 (for legacy chip only) (continued)

at specified junction temperature, VI = 14 V, CIN = 0.33 µF, COUT = 0.1µF and IO = 40 mA (unless otherwise noted)((1))

PARAMETER

TEST CONDITIONS(2)

MIN

TYP

MAX

UNIT

Bias current

TJ = 25°C

4.2

6

mA

TJ = 125°C

5.5

Bias current change

TJ = 0°C to 125°C

VI = 14 V to 25 V

1.5

mA

IO = 1 mA to 40 mA

0.1

(1)

Applies to UA78L10AC.

(2)

Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately. For legacy

chip, temperature range for the UA78L10AC is TJ = 0°C to 125°C.

6.13 Electrical Characteristics: UA78L15 (for both legacy and new chip)

at specified junction temperature, VI = 23 V, CIN = 0.33 µF, COUT = 0.1µF and IO = 40 mA (unless otherwise noted) (1)

PARAMETER

TEST CONDITIONS (2)

MIN

TYP

MAX

UNIT

Output voltage

VI = 17.5 V to 30 V, and

IO = 1 mA to 40 mA

TJ = 25°C

UA78L15C (legacy

chip)

13.8

15

16.2

V

UA78L15AC

(legacy chip)

14.4

15

15.6

V

TJ = 0°C to 125°C

UA78L15C (legacy

chip)

13.5

16.5

V

UA78L15AC

(legacy chip)

14.25

15.75

V

TJ = 0°C to 125°C, and IO = 1 mA to 70 mA

UA78L15C (legacy

chip)

13.5

16.5

V

UA78L15AC

(legacy chip)

14.25

15.75

V

VI = 17.5 V to 30 V, and

IO = 1 mA to 40 mA

TJ = 25°C

UA78L15C (new

chip)

14.750

15

15.425

V

UA78L15AC (new

chip)

14.750

15

15.425

TJ = -40°C to 125°C

UA78L15C (new

chip)

14.575

15.450

UA78L15AC (new

chip)

14.575

15.450

TJ = -40°C to 125°C, and IO = 1 mA to 70 mA

UA78L15C (new

chip)

14.35

15.45

UA78L15AC (new

chip)

14.35

15.45

Input voltage regulation

TJ = 25°C

VI = 17.5 V to 30 V

for legacy chip

65

300

mV

VI = 20 V to 30 V

58

250

VI = 17.5 V to 30 V

for new chip

65

82

VI = 20 V to 30 V

58

60

Ripple rejection

TJ = 25°C

VI = 18.5 V to 28.5 V, and f =

120 Hz

UA78L15C (legacy

chip)

33

39

dB

UA78L15AC

(legacy chip)

34

39

VI = 18.5 V to 28.5 V, and f =

120 Hz

UA78L15C (new

chip)

40

45

UA78L15AC (new

chip)

40

45

Output voltage regulation

TJ = 25°C

IO = 1 mA to 100 mA

for legacy chip

25

150

mV

IO = 1 mA to 40 mA

15

75

IO = 1 mA to 100 mA

for new chip

25

27

IO = 1 mA to 40 mA

15

60

Output noise voltage

TJ = 25°C, and f = 10 Hz

to 100 kHz

for legacy chip

82

μV

for new chip

388

UA78L

SLVS010W – JANUARY 1976 – REVISED APRIL 2023

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