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MPC9773 Datasheet(PDF) 7 Page - Renesas Technology Corp

Part # MPC9773
Description  3.3 V 1:12 LVCMOS PLL Clock Generator
PDF  22 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

MPC9773 Datasheet(HTML) 7 Page - Renesas Technology Corp

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MPC9773 REVISION 6 MARCH 16, 2016
7
©2016 Integrated Device Technology, Inc.
MPC9773 Data Sheet
3.3 V 1:12 LVCMOS PLL CLOCK GENERATOR
Table 10. AC Characteristics (VCC = 3.3 V ± 5%, TA = -40°C to 85°C)
(1), (2)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
fREF
Input Reference Frequency
4 feedback
6 feedback
8 feedback
10 feedback
12 feedback
16 feedback
20 feedback
24 feedback
32 feedback
40 feedback
Input Reference Frequency in PLL Bypass Mode
50.0
33.3
25.0
20.0
16.6
12.5
10.0
8.33
6.25
5.00
121.2
80.8
60.6
48.5
40.4
30.3
24.2
20.2
15.1
12.1
250
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
PLL locked
PLL bypass
fVCO
VCO Frequency Range
200
485
MHz
fMAX
Output Frequency
2 output
4 output
6 output
8 output
10 output
12 output
16 output
20 output
24 output
100.0
50.0
33.3
25.0
20.0
16.6
12.5
10.0
8.33
242.5
121.2
80.8
60.6
48.5
40.4
30.3
24.2
20.2
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
PLL locked
fSTOP_CLK
Serial Interface Clock Frequency
20
MHz
VPP
Peak-to-Peak Input Voltage
PCLK, PCLK
400
1000
mV
LVPECL
VCMR
Common Mode Range(3)
PCLK, PCLK
1.2
VCC – 0.9
V
LVPECL
tPW,MIN
Input Reference Pulse Width(4)
2.0
ns
tR, tF
CCLKx Input Rise/Fall Time(5)
1.0
ns
0.8 to 2.0 V
t()
Propagation Delay (static phase offset)(6)
6.25 MHz < fREF < 65.0 MHz
65.0 MHz < fREF < 125 MHz
fREF = 50 MHz and feedback = 8
–3
–4
–166
+3
+4
+166
ps
PLL locked
tSK(O)
Output-to-Output Skew(7)
within QA outputs
within QB outputs
within QC outputs
all outputs
100
100
100
250
ps
ps
ps
ps
DC
Output Duty Cycle(8)
(T
2) –200
T
2
(T
2) +200
ps
tR, tF
Output Rise/Fall Time
0.1
1.0
ns
0.55 to 2.4 V
tPLZ, HZ
Output Disable Time
8.0
ns
tPZL, LZ
Output Enable Time
8.0
ns
tJIT(CC)
Cycle-to-cycle Jitter(9)
150
ps
tJIT(PER)
Period Jitter(10)
100
ps
tJIT()
I/O Phase Jitter RMS (1
)(11)
4 feedback
6 feedback
8 feedback
10 feedback
12 feedback
16 feedback
20 feedback
24 feedback
32 feedback
40 feedback
11
86
13
88
16
19
21
22
27
30
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
(VCO = 400 MHz)



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