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TLV709 Datasheet(PDF) 16 Page - Texas Instruments

Part # TLV709
Description  TLV709 150-mA, 30-V, 3.2-μA Quiescent Current, Low-Dropout Linear Regulator
PDF  30 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TLV709 Datasheet(HTML) 16 Page - Texas Instruments

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8.2.2.6 Power Dissipation (PD)
Circuit reliability requires consideration of the device power dissipation, location of the circuit on the printed
circuit board (PCB), and correct sizing of the thermal plane. The PCB area around the regulator must have few
or no other heat-generating devices that cause added thermal stress.
To first-order approximation, power dissipation in the regulator depends on the input-to-output voltage difference
and load conditions. The following equation calculates power dissipation (PD).
PD = (VIN – VOUT) × IOUT
(7)
Note
Power dissipation can be minimized, and therefore greater efficiency can be achieved, by correct
selection of the system voltage rails. For the lowest power dissipation, use the minimum input voltage
required for correct output regulation.
For devices with a thermal pad, the primary heat conduction path for the device package is through the thermal
pad to the PCB. Solder the thermal pad to a copper pad area under the device. This pad area must contain an
array of plated vias that conduct heat to additional copper planes for increased heat dissipation.
The maximum power dissipation determines the maximum allowable ambient temperature (TA) for the device.
According to the following equation, power dissipation and junction temperature are most often related by the
junction-to-ambient thermal resistance (RθJA) of the combined PCB and device package and the temperature of
the ambient air (TA).
TJ = TA + (RθJA × PD)
(8)
Thermal resistance (RθJA) is highly dependent on the heat-spreading capability built into the particular PCB
design, and therefore varies according to the total copper area, copper weight, and location of the planes.
The junction-to-ambient thermal resistance listed in the Thermal Information table is determined by the JEDEC
standard PCB and copper-spreading area, and is used as a relative measure of package thermal performance.
As mentioned in the An empirical analysis of the impact of board layout on LDO thermal performance application
note, RθJA can be improved by 35% to 55% compared to the Thermal Information table value with the PCB
board layout optimization.
8.2.2.7 Estimating Junction Temperature
The JEDEC standard now recommends the use of psi (Ψ) thermal metrics to estimate the junction temperatures
of the linear regulator when in-circuit on a typical PCB board application. These metrics are not thermal
resistance parameters and instead offer a practical and relative way to estimate junction temperature. These
psi metrics are determined to be significantly independent of the copper area available for heat-spreading.
The Thermal Information table lists the primary thermal metrics, which are the junction-to-top characterization
parameter (ψJT) and junction-to-board characterization parameter (ψJB). These parameters provide two methods
for calculating the junction temperature (TJ), as described in the following equations. Use the junction-to-top
characterization parameter (ψJT) with the temperature at the center-top of device package (TT) to calculate
the junction temperature. Use the junction-to-board characterization parameter (ψJB) with the PCB surface
temperature 1 mm from the device package (TB) to calculate the junction temperature.
TJ = TT + ψJT × PD
(9)
where:
• PD is the dissipated power
• TT is the temperature at the center-top of the device package
TLV709
SLVSGU2A – FEBRUARY 2023 – REVISED MAY 2023
www.ti.com
16
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Product Folder Links: TLV709



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