X40410V8-C datasheet(3/24 Pages) RENESAS

3 / 24 page

X40410, X40411, X40414, X40415

FN8116 Rev 0.00

Page 3 of 24

March 28, 2005

PRINCIPLES OF OPERATION

Power-On Reset

Application of power to the X40410/11/14/15 activates a

Power-on Reset Circuit that pulls the RESET/RESET pins

active. This signal provides several benefits.

– It prevents the system microprocessor from starting to

operate with insufficient voltage.

– It prevents the processor from operating prior to stabiliza-

tion of the oscillator.

– It allows time for an FPGA to download its configuration

prior to initialization of the circuit.

– It prevents communication to the EEPROM, greatly

reducing the likelihood of data corruption on power-up.

When VCC exceeds the device VTRIP1 threshold value for

tPURST (selectable) the circuit releases the RESET

(X40411) and RESET (X40410) pin allowing the system to

begin operation.

Low Voltage VCC (V1 Monitoring)

During operation, the X40410/11/14/15 monitors the VCC

level and asserts RESET/RESET if supply voltage falls

below a preset minimum VTRIP1. The RESET/RESET sig-

nal prevents the microprocessor from operating in a

power fail or brownout condition. The V1FAIL signal

remains active until the voltage drops below 1V. It also

remains active until VCC returns and exceeds VTRIP1 for

tPURST.

Low Voltage V2 Monitoring

The X40410/11/14/15 also monitors a second voltage level

and asserts V2FAIL if the voltage falls below a preset

minimum VTRIP2. The V2FAIL signal is either ORed with

RESET to prevent the microprocessor from operating in a

power fail or brownout condition or used to interrupt the

microprocessor with notification of an impending power

failure. For the X40410/11 the V2FAIL signal remains

active until the VCC drops below 1V (VCC falling). It also

remains active until V2MON returns and exceeds VTRIP2

by 0.2V. This voltage sense circuitry monitors the power

supply connected to the V2MON pin. If VCC = 0, V2MON

can still be monitored.

For the X40414/15 devices, the V2FAIL signal remains

actice until VCC drops below 1Vx and remains active until

V2MON returns and exceeds VTRIP2. This sense circuitry

is powered by VCC. If VCC = 0, V2MON cannot be moni-

tored.

Figure 1. Two Uses of Multiple Voltage Monitoring

SCL

Serial Clock.

The Serial Clock controls the serial bus timing for data input and output.

WDO

WDO Output.

WDO is an active LOW, open drain output which goes active whenever the watch-

dog timer goes active.

VCC

Supply Voltage

PIN DESCRIPTION (Continued)

Name

Function

SOIC TSSOP

6–10V

VCC

Reg

V2MON

X40411-A

Resistors selected so 3V appears on V2MON when unregulated

supply reaches 6V.

Unreg.

Supply

VCC

X40414-C

RESET

V2FAIL

System

VCC

Reset

RESET

V2FAIL

VCC

System

Reset

Notice:

No external components required to monitor two voltages.

V2MON

3.3V

Reg

1.2V

Reg

V2MON

(2.9V)

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