X80140, X80141, X80142, X80143, X80144

FN8153 Rev 0.00

Page 4 of 18

January 20, 2005

Equivalent A.C. Output Load Circuit

VREF3

V3MON Trip Point Voltage

0.85

3.50

V

X80140

2.20

2.25

2.30

V

X80141

0.85

0.90

0.95

V

X80142

1.65

1.70

1.75

V

X80143

0.85

0.90

0.95

V

X80144

0.85

0.90

0.95

V

VREF4

V4MON Trip Point Voltage

0.85

3.50

V

All Devices

0.85

0.90

0.95

V

VREF

Voltage Reference Long Term Drift

10 years

0

-100

mV

AC CHARACTERISTICS

tMR

(Note 3)

Minimum time high for reset valid

on the MR pin

5

s

tMRE

(Note 3)

Delay from MR enable to V1GDO

HIGH

1.6

s

tDPOR

(Note 3)

Internal Device Delay on power up

45

50

55

ms

tTO

(Note 3)

ViGDO turn off time

50

ns

Electrical Specifications (Standard Setting) Over the recommended operating conditions unless otherwise specified. (Continued)

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Electrical Specifications

(Programmable Parameters) Over the recommended operating conditions unless otherwise specified.

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

tSPOR

Delay before RESET assertion

TPOR1 = 0 TPOR0 = 0 Factory Default

90

100

110

ms

TPOR1 = 0 TPOR0 = 1 (Note 3)

450

500

550

ms

TPOR1 = 1 TPOR0 = 0 (Note 3)

0.9

1

1.1

s

TPOR1 = 1 TPOR0 = 1 (Note 3)

4.5

5

5.5

s

tDELAYi

Time Delay used in Power Sequencing

(i = 1 to 4)

TiD1 = 0 TiD0 = 0

Factory Default

90

100

110

ms

TiD1 = 0 TiD0 = 1

(Note 3)

450

500

550

ms

TiD1 = 1 TiD0 = 0

(Note 3)

0.9

1

1.1

s

TiD1 = 1 TiD0 = 1

(Note 3)

4.5

5

5.5

s

5V

SDA

30pF

4.6k



RESET

30pF

V1GDO,

5V

4.6k



30pF

V2GDO,

V3GDO,

V4GDO

5V

4.6k



A.C. Test Conditions

Input pulse levels

VCC x 0.1 to VCC x 0.9

Input rise and fall times

10ns

Input and output timing levels

VCC x 0.5

Output load

Standard output load