X80141 datasheet(14/18 Pages) RENESAS

14 / 18 page

X80140, X80141, X80142, X80143, X80144

FN8153 Rev 0.00

Page 14 of 18

January 20, 2005

Bus Interface Information

Interface Conventions

The device supports a bidirectional bus oriented protocol. The

protocol defines any device that sends data onto the bus as a

transmitter, and the receiving device as the receiver. The

device controlling the transfer is called the master and the

device being controlled is called the slave. The master always

initiates data transfers, and provides the clock for both transmit

and receive operations. Therefore, the devices in this family

operate as slaves in all applications.

It should be noted that the ninth clock cycle of the read

operation is not a “don’t care.” To terminate a read operation,

the master must either issue a STOP condition during the ninth

cycle or hold SDA HIGH during the ninth clock cycle and then

issue a STOP condition.

Serial Clock and Data

Data states on the SDA line can change only during SCL LOW.

SDA state changes during SCL HIGH are reserved for

indicating START and STOP conditions. See Figure 11.

Serial START Condition

All commands are preceded by the START condition, which is

a HIGH to LOW transition of SDA when SCL is HIGH. The

device continuously monitors the SDA and SCL lines for the

START condition and does not respond to any command until

this condition has been met. On power up, the SCL pin must

be brought LOW prior to the START condition.

Serial STOP Condition

All communications must be terminated by a STOP condition,

which is a LOW to HIGH transition of SDA when SCL is HIGH

followed by a HIGH to LOW on SCL. After going LOW, SCL

can stay LOW or return to HIGH. The STOP condition also

places the device into the Standby power mode after a read

sequence.

Serial Acknowledge

Acknowledge is a software convention used to indicate

successful data transfer. The transmitting device, either master

or slave, releases the bus after transmitting eight bits. During

the ninth clock cycle, the receiver pulls the SDA line LOW to

acknowledge that it received the eight bits of data. See Figure

12.

The device responds with an acknowledge after recognition of

a START condition and if the correct Device Identifier and

Select bits are contained in the Slave Address Byte. If a write

operation is selected, the device responds with an

acknowledge after the receipt of each subsequent eight bit

word. The device acknowledges all incoming data and address

bytes, except for the Slave Address Byte when the Device

Identifier and/or Select bits are incorrect.

The device does not acknowledge any instructions following a

non-volatile write operation, unless the VP pin has the

recommended programming voltage applied for the duration of

the write cycle.

In the read mode, the device transmits eight bits of data,

releases the SDA line, then monitors the line for an

acknowledge. If an acknowledge is detected and no STOP

condition is generated by the master, the device continues

transmitting data. The device terminates further data trans-

missions if an acknowledge is not detected. The master must

then issue a STOP condition to return the device to Standby

mode and place the device into a known state.

Device Addressing

Addressing Protocol Overview

Depending upon the operation to be performed on each of

these individual parts, a 1, 2 or 3 Byte protocol is used. All

operations however must begin with the Slave Address Byte

being clocked into the SMBus port on the SCL and SDA pins.

The Slave address selects the part of the device to be

addressed, and specifies if a Read or Write operation is to be

performed.

Slave Address Byte

Following a START condition, the master must output a Slave

Address Byte. This byte consists of three parts:

• The Device Type Identifier which consists of the most

significant four bits of the Slave Address (SA7 - SA4).

SCL

SDA

Start

Stop

FIGURE 11. VALID START AND STOP CONDITIONS

Data Output from

Transmitter

Data Output from

Receiver

Start

Acknowledge

SCL from

Master

FIGURE 12. ACKNOWLEDGE RESPONSE FROM RECEIVER

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