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NHUMB13 Datasheet(PDF) 3 Page - Nexperia B.V. All rights reserved |
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NHUMB13 Datasheet(HTML) 3 Page - Nexperia B.V. All rights reserved |
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3 / 15 page ![]() Nexperia NHUMB10/13/9 series 80 V, 100 mA PNP/PNP resistor-equipped double transistors 8. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Tamb = 25 °C unless otherwise specified. Symbol Parameter Conditions Min Max Unit Per transistor VCBO collector-base voltage open emitter - -80 V VCEO collector-emitter voltage open base - -80 V VEBO emitter-base voltage open collector - -7 V input voltage NHUMB10 -20 +7 V NHUMB13 -30 +7 V VI NHUMB9 -40 +7 V IO output current - -100 mA Ptot total power dissipation Tamb ≤ 25 °C [1] - 235 mW Per device Ptot total power dissipation Tamb ≤ 25 °C [1] - 350 mW Tj junction temperature - 150 °C Tamb ambient temperature -55 150 °C Tstg storage temperature -65 150 °C [1] Device mounted on an FR4 Printed-Circuit-Board (PCB); single-sided copper; tin-plated and standard footprint. Tamb (°C) -75 175 125 25 75 -25 aaa-031893 200 100 300 400 Ptot (mW) 0 FR4 PCB, single-sided copper, standard footprint Fig. 1. Per device: Power derating curve SOT363 (SC-88) NHUMB10_13_9_SER All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 1 — 23 July 2020 3 / 15 |
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