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LT3756 Datasheet(PDF) 10 Page - Analog Devices |
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LT3756 Datasheet(HTML) 10 Page - Analog Devices |
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10 / 31 page ![]() LT8355-1 10 Rev. A For more information www.analog.com PIN FUNCTIONS PWMTG1, PWMTG2 (Pins 1, 21): High Side Gate Driver for the External Series PMOS Switch of Each Channel. Use these pins to disconnect the load for PWM dimming as well as fault events. PWMTG drives the PMOS gate between ISP – 8.5V and ISP (typical) to cut off the flow of residual charge from the output capacitor when the LED load should be disconnected, as well as to prevent the long transient that would result from needing to recharge the output capacitor at the end of a long PWM off period. Leave open if unused. The voltage at PWMTG is limited to 8.5V (typical) below the voltage at ISP to protect the gate of the PMOS switch. ISN1, ISN2 (Pins 2, 20): Kelvin connect this pin to the low side of the LED current feedback sense resistors RILED1,2 of each channel. Current through sense resistor, RILED2 is 250mV/RILED2 while CTRL2 > 1.5V and IADJ2 > 1.5V. It varies as [(CTRL2 – 0.48V) • (IADJ2 – 0.5V) –0.02V]/ (4RILED2) if the voltage at the CTRL2 and IAJD2 pins vary between 0.5V to 1.5V. The current through sense resistor RILED1 is 250mV/RILED1 while CTRL1 > 1.5V. It varies as (CTRL1 − 500mV)/(4RILED1) if the voltage at the CTRL1 pin is between 500mV and 1.5V. ISP1, ISP2 (Pins 3, 19): Kelvin connect this pin to the high side of the LED current feedback sense resistor RILED of each channel, see ISN1, ISN2 for more details. If the voltage difference VISP – VISN ever exceeds around 670mV (typical), switching stops, PWMTG goes high to disconnect the load, and soft-start resets. After a cooldown period, the part will re-enter soft-start. See the Applications Information section for more details. FB1, FB2 (Pins 4, 18): Output Voltage Feedback Pin for Each Channel. This pin is used for output voltage regula- tion and limiting. Tie this pin to a resistive voltage divider from the output voltage. When the voltage at FB reaches 1.2V (typical), the control loop will reduce the switch cur- rent to regulate the output voltage such that FB remains around 1.2V. If the voltage at FB exceeds 1.26V (typical), PWMTG is driven high and switching briefly stops. If the voltage at FB falls below 300mV (typical) after soft-start has finished, PWMTG is driven high, soft-start resets, and switching stops. After a cooldown period, the part will re-enter soft-start. See the Applications Information section for more info on the use of the FB pin for general applications. VC1, VC2 (Pins 5, 17): An Internal Error Amplifier Node Used for Compensation. Stabilize the loop by connecting a capacitor or RC network between this pin and ground for each channel. Read more in the Applications Information section for details about compensation. CTRL1, CTRL2, IADJ2 (Pins 6, 8, 9): Two-Pin Analog Alternative to PWM Dimming. Tie CTRL1,2 and IADJ2 to VREF or INTVCC to set RILED current to full-scale for each channel. The product of the offset CTRL2 and IADJ2 pin voltages sets the current in RILED2 as [(CTRL2 – 0.48V) • (IADJ2 – 0.5V) – 0.02V]/(4RILED2) when the voltages at CTRL2 and IADJ2 pins vary between 0.5V to 1.5V. The pin voltage of CTRL1 linearly sets the current in RILED1 as (CTRL1 – 0.5V)/(4RILED1) when the voltage at CTRL1 pin varies between 0.5V and 1.5V. FAULT1, FAULT2 (Pins 7, 13): Open-Drain Fault Indication Pin Indicating Short LED, Open LED, Overvoltage and Overcurrent Faults for Each Channel. Tie these pins through 100k resistors to INTVCC, or any supply less than 15V or use them as open-drain signals. LT8355-1 pulls these pins low to signal all reported fault events from each channel independently. PWM1, PWM2 (Pins 10, 11): Pulse Width Modulation (PWM) Dimming Generation Control Pin for Each Channel. Connect an analog signal to this pin to use the internal exponential PWM dimming generator. When the voltages at these pins remain between 0.5V and 1.5V, the duty ratio of the internal dimming PWM generator will vary with the pin voltage. A linear ramp of voltage on the PWM pins between 0.5V and 1.5V lasting many PWMTG cycles at fSW/1000 will result in an exponentially increasing PWM duty ratio. An external PWM signal can also drive this pin directly if the ON and OFF voltages are above 1.6V and below 0.4V, respectively. If PWM dimming is not used, tie these pins to INTVCC or VREF. RT (Pin 12): Connect a resistor between this pin and ground to set the switching frequency and PWM dimming frequency. Do not connect anything but a resistor to this pin or the device may not function correctly. |
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