LT3756 datasheet(13/31 Pages) AD

13 / 31 page

LT8355-1

Rev. A

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OPERATION

The LT8355-1 is a dual-channel constant-frequency,

constant-current/constant-voltage (CC/CV) boost power

stage controller. The operation of the part can be best

understood by looking at the Block Diagram. The con-

troller can implement boost, SEPIC, buck mode or buck-

boost mode LED drivers. At the beginning of every clock

cycle, the clock signal sets an SR-latch controlling the

gate driver. The external NMOS switch turns on and con-

nects the inductor to ground. The positive voltage drops

across the inductor results in linearly increasing current

in the inductor. The switch will remain on until the current

comparator resets it. This reset will occur when the switch

current, as measured by the switch current sense resistor,

exceeds the internal demand current. This demand cur-

rent comes from the error amplifier of each respective

channel. The external LED current sense resistor used

to program load current drives the error amplifier. The

voltage drop across the sense resistor multiplied by the

amplifier’s transconductance establishes the demand cur-

rent. Without a forced offset, the error amplifier regulates

the load to zero current based on the voltage across the

LED current sense resistor.

To establish the positive offset in the error amplifier

needed to program the LED current, a small current is

intentionally pulled from only one input of the amplifier

through an internal series resistor. The CTRL1,2 and

IADJ2 pins establish this offset current by varying the

voltage dropped across a second internal resistor to GND.

Changing the CTRL1,2 pin voltage will vary the voltage

dropped across the second internal resistor, while chang-

ing the IADJ2 pin voltage will change the value of that

resistor for channel 2. This varies the LED current sense

resistor regulation voltage between true zero and 250mV.

During constant-current operation, the FB pin provides

overvoltage protection. When the FB pin voltage is below

its regulation threshold, the FB amplifier has little effect

on demand current. However, as the FB pin voltage

approaches 1.2V, the FB amplifier has an increasingly

pronounced effect, until it eventually dominates the

demand current. If the FB pin voltage exceeds the reg-

ulation threshold by 60mV (typical), the part detects an

overvoltage event. Similarly, if the voltage at the FB pin

ever falls below 300mV (typical, excluding startup) then

the part detects a short LED event.

Fast overcurrent protection relies on a separate signal

path than the main LED current sense amplifier. If the

LED current sense resistor voltage (VISP − VISN) exceeds

670mV (typical), switching stops. This event causes a

brief interruption of switching while soft-start is reset,

followed by a soft-start of the switching.

Four different methods for dimming the LED load are pro-

vided with LT8355-1. First, the voltages at the CTRL1,2

and IADJ2 pins, which set the LED current sense resistor

regulation threshold for each channel, provide continu-

ous, analog dimming of the LED load. In addition, two

methods of PWM dimming exist. The first, external PWM,

relies on a user-provided PWM signal. This signal drives

the PWM pin, directly turning on and off the LED load.

This method can achieve dimming ratios of 20,000:1 at

100Hz PWM frequency. Alternatively, the part can gen-

erate the PWM signal internally from an analog control

signal at the PWM pin.

The internal dimming PWM generator selects one of 128

predetermined duty ratio values based on the analog volt-

age at the PWM pin. An exponential relationship exists

between the PWM pin voltage and these duty ratio values.

For example, consider a voltage at the PWM pin starting

at 0V. When the voltage increases until the duty ratio is

9.6%, further increasing by 7.8mV(typical) will change the

duty ratio to 10%. By the time the voltage is high enough

to set 96% duty, the same 7.8mV (typical) increase will

move the duty ratio up to 100%. A straight ramp at the

PWM pin lasting many PWMTG dimming periods as set

by RT will create an exponentially increasing PWM duty

ratio for the LED load.

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