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SLG46867MTR Datasheet(PDF) 16 Page - Renesas Technology Corp |
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SLG46867MTR Datasheet(HTML) 16 Page - Renesas Technology Corp |
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16 / 209 page ![]() Datasheet 28-Feb-2023 CFR0011-120-00 Revision 3.21 Page 16 of 208 © 2023 Renesas Electronics Corporation SLG46867 GreenPAK Programmable Mixed-Signal Matrix with Dual 44 m Ω/2 A P-FET Note 1 No hysteresis. Note 2 DC or average current through any pin should not exceed value given in Absolute Maximum Conditions. Table 7: EC of the I2C Pins at T = -40 °C to +85 °C, VDD = 2.3 V to 5.5 V Unless Otherwise Noted Parameter Description Condition Fast-Mode Fast-Mode Plus Unit Min Max Min Max VIL LOW-level Input Voltage -0.5 0.3xVDD -0.5 0.3xVDD V VIH HIGH-level Input Voltage 0.7xVDD 5.5 0.7xVDD 5.5 V VHYS Hysteresis of Schmitt Trigger Inputs 0.05xVDD -- 0.05xVDD -- V VOL1 LOW-Level Output Voltage 1 (Open-Drain or open collector) at 3mA sink current VDD > 2 V 0 0.4 0 0.4 V VOL2 LOW-Level Output Voltage 2 (Open-Drain or open collector) at 2 mA sink current VDD ≤ 2 V 0 0.2xVDD 0 0.2xVDD V IOL LOW-Level Output Current (Note 1) VOL = 0.4 V, VDD = 2.3 V 3 -- 19.5 -- mA VOL = 0.4 V, VDD = 3.0 V 3 -- 20 -- mA VOL = 0.4 V, VDD = 4.5 V 3 -- 20 -- mA VOL= 0.6 V 6 -- -- -- mA tof Output Fall Time from VIHmin to VILmax (Note 1) 14x (VDD/5.5V) 250 10x (VDD/5.5V) 120 ns tSP Pulse Width of Spikes that must be suppressed by the Input Filter 0 50 0 50 ns Ii Input Current each IO Pin 0.1xVDD < VI < 0.9xVDDmax -10 +10 -10 +10 µA Ci Capacitance for each IO Pin -- 10 -- 10 pF Note 1 Does not meet standard I2C specifications: tof = 20x(VDD/5.5V) (min); For Fast-mode Plus IOL = 20 mA (min) at VOL = 0.4 V. Note 2 For Fast-mode Plus SDA pin must be configured as NMOS 2x Open-Drain, see register [789] in section 18. Table 6: EC at T = -40 °C to +85 °C, VDD = 2.3 V to 5.5 V Unless Otherwise Noted (continued) Parameter Description Condition Min Typ Max Unit |
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