Preliminary Technical Data

AD7747

Rev. PrC| Page 17 of 20

CAP DAC A REGISTER

Address Pointer 0x0B, Default Value 0x00

Capacitive DAC setup.

Table 19. Cap DAC A Register Bit Map

Bit

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Mnemonic

DACAENA

-

DACA—6-Bit Value

Default

0

0

0x00

Table 20.

Bit

Mnemonic

Description

7

DACAENA

DACAENA = 1 connects capacitive DACA to the positive capacitance input.

6

-

This bit must be 0 for proper operation.

5-1

DACA

DACA value, Code 0x00

≈ 0 pF, Code 0x3F ≈ full range.

CAP DAC B REGISTER

Address Pointer 0x0C, Default Value 0x00

Capacitive DAC setup.

Table 21. Cap DAC B Register Bit Map

Bit

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Mnemonic

DACAENB

-

DACB—6-Bit Value

Default

0

0

0x00

Table 22.

Bit

Mnemonic

Description

7

DACBENB

DACBENB = 1 connects capacitive DACB to the negative capacitance input.

6

-

This bit must be 0 for proper operation.

5-1

DACB

DACB value, Code 0x00

≈ 0 pF, Code 0x3F ≈ full range.

CAP OFFSET CALIBRATION REGISTER

16 Bits, Address Pointer 0x0D, 0x0E,

Default Value 0x8000

The capacitive offset calibration register holds the capacitive

channel zero-scale calibration coefficient. The coefficient is

used to digitally remove the capacitive channel offset. The

register value is updated automatically following the execution

of a capacitance offset calibration. The capacitive offset calibra-

tion resolution (cap offset register LSB) is less than TBD aF; the

full range is TBD pF.

CAP GAIN CALIBRATION REGISTER

16 Bits, Address Pointer 0x0F, 0x10,

Default Value 0xXXXX

Capacitive gain calibration register. The register holds the

capacitive channel full-scale factory calibration coefficient.

VOLT GAIN CALIBRATION REGISTER

16 Bits, Address Pointer 0x11,0x12,

Default Value 0xXXXX

Voltage gain calibration register. The register holds the voltage

channel full-scale factory calibration coefficient.